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MC34063AP1 데이터시트(Datasheet) 1 Page - ON Semiconductor

부품명 MC34063AP1
상세내용  1.5 A, Step−Up/Down/ Inverting Switching Regulators
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제조사  ONSEMI [ON Semiconductor]
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© Semiconductor Components Industries, LLC, 2007
February, 2007 − Rev. 19
1
Publication Order Number:
MC34063A/D
MC34063A, MC33063A,
NCV33063A
1.5 A, Step−Up/Down/
Inverting Switching
Regulators
The MC34063A Series is a monolithic control circuit containing the
primary functions required for DC−to−DC converters. These devices
consist of an internal temperature compensated reference, comparator,
controlled duty cycle oscillator with an active current limit circuit,
driver and high current output switch. This series was specifically
designed to be incorporated in Step−Down and Step−Up and
Voltage−Inverting applications with a minimum number of external
components. Refer to Application Notes AN920A/D and AN954/D
for additional design information.
Features
Operation from 3.0 V to 40 V Input
Low Standby Current
Current Limiting
Output Switch Current to 1.5 A
Output Voltage Adjustable
Frequency Operation to 100 kHz
Precision 2% Reference
Pb−Free Packages are Available
Figure 1. Representative Schematic Diagram
SQ
R
Q2
Q1
100
Ipk
Oscillator CT
Comparator
+
1.25 V
Reference
Regulator
1
2
3
4
5
6
7
8
Drive
Collector
Ipk
Sense
VCC
Comparator
Inverting
Input
Switch
Collector
Switch
Emitter
Timing
Capacitor
GND
(Bottom View)
This device contains 51 active transistors.
SOIC−8
D SUFFIX
CASE 751
PDIP−8
P, P1 SUFFIX
CASE 626
1
8
1
8
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
ORDERING INFORMATION
1
Switch
Collector
Switch
Emitter
Timing
Capacitor
GND
Driver
Collector
Ipk Sense
VCC
Comparator
Inverting
Input
(Top View)
2
3
45
6
7
8
PIN CONNECTIONS
http://onsemi.com
x
= 3 or 4
A
= Assembly Location
L, WL
= Wafer Lot
Y, YY
= Year
W, WW
= Work Week
G or
G
= Pb−Free Package
1
8
3x063AP1
AWL
YYWWG
1
8
33063AVP
AWL
YYWWG
3x063
ALYWA
G
1
8
MARKING
DIAGRAMS
 2 page
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2
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Power Supply Voltage
VCC
40
Vdc
Comparator Input Voltage Range
VIR
−0.3 to + 40
Vdc
Switch Collector Voltage
VC(switch)
40
Vdc
Switch Emitter Voltage (VPin 1 = 40 V)
VE(switch)
40
Vdc
Switch Collector to Emitter Voltage
VCE(switch)
40
Vdc
Driver Collector Voltage
VC(driver)
40
Vdc
Driver Collector Current (Note 1)
IC(driver)
100
mA
Switch Current
ISW
1.5
A
Power Dissipation and Thermal Characteristics
Plastic Package, P, P1 Suffix
TA = 25°C
PD
1.25
W
Thermal Resistance
RqJA
100
°C/W
SOIC Package, D Suffix
TA = 25°C
PD
625
mW
Thermal Resistance
RqJA
160
°C/W
Operating Junction Temperature
TJ
+150
°C
Operating Ambient Temperature Range
TA
°C
MC34063A
0 to +70
MC33063AV, NCV33063A
−40 to +125
MC33063A
−40 to + 85
Storage Temperature Range
Tstg
−65 to +150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Maximum package power dissipation limits must be observed.
2. This device series contains ESD protection and exceeds the following tests: Human Body Model 4000 V per MIL−STD−883, Method 3015.
Machine Model Method 400 V.
3. NCV prefix is for automotive and other applications requiring site and change control.
 3 page
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3
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, TA = Tlow to Thigh [Note 4], unless otherwise specified.)
Characteristics
Symbol
Min
Typ
Max
Unit
OSCILLATOR
Frequency (VPin 5 = 0 V, CT = 1.0 nF, TA = 25°C)
fosc
24
33
42
kHz
Charge Current (VCC = 5.0 V to 40 V, TA = 25°C)
Ichg
24
35
42
mA
Discharge Current (VCC = 5.0 V to 40 V, TA = 25°C)
Idischg
140
220
260
mA
Discharge to Charge Current Ratio (Pin 7 to VCC, TA = 25°C)
Idischg/Ichg
5.2
6.5
7.5
Current Limit Sense Voltage (Ichg = Idischg, TA = 25°C)
Vipk(sense)
250
300
350
mV
OUTPUT SWITCH (Note 5)
Saturation Voltage, Darlington Connection
(ISW = 1.0 A, Pins 1, 8 connected)
VCE(sat)
1.0
1.3
V
Saturation Voltage (Note 6)
(ISW = 1.0 A, RPin 8 = 82 W to VCC, Forced b ] 20)
VCE(sat)
0.45
0.7
V
DC Current Gain (ISW = 1.0 A, VCE = 5.0 V, TA = 25°C)
hFE
50
75
Collector Off−State Current (VCE = 40 V)
IC(off)
0.01
100
mA
COMPARATOR
Threshold Voltage
TA = 25°C
TA = Tlow to Thigh
Vth
1.225
1.21
1.25
1.275
1.29
V
Threshold Voltage Line Regulation (VCC = 3.0 V to 40 V)
MC33063A, MC34063A
MC33063AV, NCV33063A
Regline
1.4
1.4
5.0
6.0
mV
Input Bias Current (Vin = 0 V)
IIB
−20
−400
nA
TOTAL DEVICE
Supply Current (VCC = 5.0 V to 40 V, CT = 1.0 nF, Pin 7 = VCC,
VPin 5 > Vth, Pin 2 = GND, remaining pins open)
ICC
4.0
mA
4. Tlow = 0°C for MC34063A, − 40°C for MC33063A, AV, NCV33063A
Thigh = +70°C for MC34063A, + 85°C for MC33063A, +125°C for MC33063AV, NCV33063A
5. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible.
6. If the output switch is driven into hard saturation (non−Darlington configuration) at low switch currents (
≤ 300 mA) and high driver currents
(
≥ 30 mA), it may take up to 2.0 ms for it to come out of saturation. This condition will shorten the off time at frequencies ≥ 30 kHz, and is
magnified at high temperatures. This condition does not occur with a Darlington configuration, since the output switch cannot saturate. If a
non−Darlington configuration is used, the following output drive condition is recommended:
Forced
b of output switch :
IC output
IC driver – 7.0 mA *
w 10
* The 100
W resistor in the emitter of the driver device requires about 7.0 mA before the output switch conducts.
 4 page
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4
ton
VCC = 5.0 V
Pin 7 = VCC
Pin 5 = GND
TA = 25°C
toff
Figure 2. Output Switch On−Off Time versus
Oscillator Timing Capacitor
Figure 3. Timing Capacitor Waveform
0.01 0.02
0.05
0.1
0.2
0.5 1.0
2.0
5.0 10
CT, OSCILLATOR TIMING CAPACITOR (nF)
10
ms/DIV
VCC = 5.0 V
Pin 7 = VCC
Pin 2 = GND
Pins 1, 5, 8 = Open
CT = 1.0 nF
TA = 25°C
1000
500
200
100
50
20
10
5.0
2.0
1.0
Figure 4. Emitter Follower Configuration Output
Saturation Voltage versus Emitter Current
Figure 5. Common Emitter Configuration Output
Switch Saturation Voltage versus
Collector Current
Figure 6. Current Limit Sense Voltage
versus Temperature
Figure 7. Standby Supply Current versus
Supply Voltage
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
IE, EMITTER CURRENT (A)
VCC = 5.0 V
Pins 1, 7, 8 = VCC
Pins 3, 5 = GND
TA = 25°C
(See Note 7)
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
IC, COLLECTOR CURRENT(A)
Darlington Connection
Forced
b = 20
−55
−25
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (°C)
VCC = 5.0 V
Ichg = Idischg
0
5.0
10
15
20
25
30
35
40
VCC, SUPPLY VOLTAGE (V)
CT = 1.0 nF
Pin 7 = VCC
Pin 2 = GND
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
1.1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
400
380
360
340
320
300
280
260
240
220
200
3.6
3.2
2.4
2.0
1.6
1.2
0.8
0.4
0
1.0
2.8
VCC = 5.0 V
Pin 7 = VCC
Pins 2, 3, 5 = GND
TA = 25°C
(See Note 7)
7. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible.
 5 page
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5
170
mH
L
8
180
7
Rsc
0.22
6
Vin
12 V
100
+
5
R1
2.2 k
R2
47 k
SQ
R
Q2
Q1
Ipk
OSC
CT
VCC
+
Comp.
1.25 V
Ref
Reg
1
2
3
4
1N5819
CT
1500
pF
330
CO
+
Vout
28 V/175 mA
Vout
1.0
mH
+
100
Optional Filter
Test
Conditions
Results
Line Regulation
Vin = 8.0 V to 16 V, IO = 175 mA
30 mV =
±0.05%
Load Regulation
Vin = 12 V, IO = 75 mA to 175 mA
10 mV =
±0.017%
Output Ripple
Vin = 12 V, IO = 175 mA
400 mVpp
Efficiency
Vin = 12 V, IO = 175 mA
87.7%
Output Ripple With Optional Filter
Vin = 12 V, IO = 175 mA
40 mVpp
Figure 8. Step−Up Converter
 6 page
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6
9a. External NPN Switch
9b. External NPN Saturated Switch
(See Note 8)
8
7
6
Rsc
Vin
1
2
Vout
R
R
³ 0 for
constant Vin
8. If the output switch is driven into hard saturation (non−Darlington configuration) at low switch currents (
≤ 300 mA) and high driver currents
(
≥ 30 mA), it may take up to 2.0 ms to come out of saturation. This condition will shorten the off time at frequencies ≥ 30 kHz, and is magnified
at high temperatures. This condition does not occur with a Darlington configuration, since the output switch cannot saturate. If a
non−Darlington configuration is used, the following output drive condition is recommended.
8
7
6
Rsc
Vin
1
2
Vout
Figure 9. External Current Boost Connections for IC Peak Greater than 1.5 A
 7 page
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7
1.25 V
Ref
Reg
Vout
5.0 V/500 mA
1.0
mH
Vout
+
100
Optional Filter
8
7
Rsc
0.33
6
Vin
25 V
100
+
R1
1.2 k
R2
3.6 k
SQ
R
Q2
Q1
Ipk
OSC
CT
VCC
+
Comp.
1
2
3
4
CT
470
pF
470
CO
+
5
L
1N5819
220
mH
Test
Conditions
Results
Line Regulation
Vin = 15 V to 25 V, IO = 500 mA
12 mV =
±0.12%
Load Regulation
Vin = 25 V, IO = 50 mA to 500 mA
3.0 mV =
±0.03%
Output Ripple
Vin = 25 V, IO = 500 mA
120 mVpp
Short Circuit Current
Vin = 25 V, RL = 0.1 W
1.1 A
Efficiency
Vin = 25 V, IO = 500 mA
83.7%
Output Ripple With Optional Filter
Vin = 25 V, IO = 500 mA
40 mVpp
Figure 10. Step−Down Converter
11a. External NPN Switch
11b. External PNP Saturated Switch
8
7
6
Rsc
Vin
1
2
Vout
8
7
6
Rsc
Vin
1
2
V
Figure 11. External Current Boost Connections for IC Peak Greater than 1.5 A
 8 page
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8
1.25 V
Ref
Reg
Vout
−12 V/100 mA
Vout
1.0
mH
+
100
Optional Filter
8
7
Rsc
0.24
6
Vin
4.5 V to 6.0 V
100
+
5
R2
8.2 k
SQ
R
Q2
Q1
Ipk
OSC
CT
Comp.
R1
953
1
2
3
4
+
1500
pF
+
1N5819
1000
mf
+
88
mH
VCC
CO
L
Test
Conditions
Results
Line Regulation
Vin = 4.5 V to 6.0 V, IO = 100 mA
3.0 mV =
±0.012%
Load Regulation
Vin = 5.0 V, IO = 10 mA to 100 mA
0.022 V =
±0.09%
Output Ripple
Vin = 5.0 V, IO = 100 mA
500 mVpp
Short Circuit Current
Vin = 5.0 V, RL = 0.1 W
910 mA
Efficiency
Vin = 5.0 V, IO = 100 mA
62.2%
Output Ripple With Optional Filter
Vin = 5.0 V, IO = 100 mA
70 mVpp
Figure 12. Voltage Inverting Converter
13a. External NPN Switch
13b. External PNP Saturated Switch
8
7
6
Vin
1
2
Vout
8
7
6
Vin
1
2
Vout
Figure 13. External Current Boost Connections for IC Peak Greater than 1.5 A
3
4
+
3
4
+
 9 page
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9
5.45
′′
2.500
′′
(Top view, copper foil as seen through the board from the component side)
(Top View, Component Side)
*Optional Filter.
Figure 14. Printed Circuit Board and Component Layout
(Circuits of Figures 8, 10, 12)
MC34063A
MC34063A
MC34063A
INDUCTOR DATA
Converter
Inductance (
mH)
Turns/Wire
Step−Up
170
38 Turns of #22 AWG
Step−Down
220
48 Turns of #22 AWG
Voltage−Inverting
88
28 Turns of #22 AWG
All inductors are wound on Magnetics Inc. 55117 toroidal core.
 10 page
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10
Calculation
Step−Up
Step−Down
Voltage−Inverting
ton/toff
Vout ) VF * Vin(min)
V
in(min) *
Vsat
Vout ) VF
V
in(min) *
Vsat * Vout
|Vout| ) VF
V
in *
Vsat
(ton + toff)
1
f
1
f
1
f
toff
ton ) toff
ton
t
off
) 1
ton ) toff
ton
t
off
) 1
ton ) toff
ton
t
off
) 1
ton
(ton + toff) − toff
(ton + toff) − toff
(ton + toff) − toff
CT
4.0 x 10−5 ton
4.0 x 10−5 ton
4.0 x 10−5 ton
Ipk(switch)
2I
out(max)
ton
t
off
) 1
2I
out(max)
2I
out(max)
ton
t
off
) 1
Rsc
0.3/Ipk(switch)
0.3/Ipk(switch)
0.3/Ipk(switch)
L(min)
(V
in(min) *
Vsat)
I
pk(switch)
t
on(max)
(V
in(min) *
Vsat * Vout)
I
pk(switch)
t
on(max)
(V
in(min) *
Vsat)
I
pk(switch)
t
on(max)
CO
9
Ioutton
V
ripple(pp)
I
pk(switch)
(ton ) toff)
8V
ripple(pp)
9
Ioutton
V
ripple(pp)
Vsat = Saturation voltage of the output switch.
VF = Forward voltage drop of the output rectifier.
The following power supply characteristics must be chosen:
Vin − Nominal input voltage.
Vout − Desired output voltage,
Iout − Desired output current.
fmin − Minimum desired output switching frequency at the selected values of Vin and IO.
Vripple(pp) − Desired peak−to−peak output ripple voltage. In practice, the calculated capacitor value will need to be increased due to its
equivalent series resistance and board layout. The ripple voltage should be kept to a low value since it will directly affect the
line and load regulation.
NOTE:
For further information refer to Application Note AN920A/D and AN954/D.
|Vout| + 1.25 1 )
R2
R1
Figure 15. Design Formula Table




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