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IRF1405SPBF 데이터시트(Datasheet) 1 Page - International Rectifier

부품명 IRF1405SPBF
상세내용  AUTOMOTIVE MOSFET ( VDSS = 55V , RDS(on) = 5.3mΩ , ID = 131A )
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제조사  IRF [International Rectifier]
홈페이지  http://www.irf.com
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 1 page
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Parameter
Max.
Units
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V
131
†
ID @ TC = 100°C
Continuous Drain Current, VGS @ 10V
93
†
A
IDM
Pulsed Drain Current

680
PD @TC = 25°C
Power Dissipation
200
W
Linear Derating Factor
1.3
W/°C
VGS
Gate-to-Source Voltage
± 20
V
EAS
Single Pulse Avalanche Energy
‚
590
mJ
IAR
Avalanche Current
See Fig.12a, 12b, 15, 16
A
EAR
Repetitive Avalanche Energy
‡
mJ
dv/dt
Peak Diode Recovery dv/dt
ƒ
5.0
V/ns
TJ
Operating Junction and
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
300 (1.6mm from case )
°C
Mounting Torque, 6-32 or M3 screw
10 lbf•in (1.1N•m)
HEXFET® Power MOSFET
Stripe Planar design of HEXFET® Power MOSFETs
utilizes the lastest processing techniques to achieve
extremely low on-resistance per silicon area. Additional
features of this HEXFET power MOSFET are a 175°C
junction operating temperature, fast switching speed
and improved repetitive avalanche rating. These
benefits combine to make this design an extremely
efficient and reliable device for use in Automotive
applications and a wide variety of other applications.
S
D
G
Absolute Maximum Ratings
VDSS = 55V
RDS(on) = 5.3mΩ
ID = 131A
†
Description
05/27/04
www.irf.com
1
AUTOMOTIVE MOSFET
Thermal Resistance
Parameter
Typ.
Max.
Units
RθJC
Junction-to-Case
–––
0.75
°C/W
RθJA
Junction-to-Ambient (PCB mount)
ˆ
–––
40
D2Pak
IRF1405S
TO-262
IRF1405L
PD-95331
IRF1405SPbF
IRF1405LPbF
Advanced Process Technology
Ultra Low On-Resistance
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Benefits
Typical Applications
Electric Power Steering (EPS)
Anti-lock Braking System (ABS)
Wiper Control
Climate Control
Power Door
Lead-Free
 2 page
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IRF1405S/LPbF
2
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Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
55
–––
–––
V
VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
–––
0.057 –––
V/°C
Reference to 25°C, ID = 1mA
RDS(on)
Static Drain-to-Source On-Resistance
–––
4.6
5.3
m
VGS = 10V, ID = 101A
„
VGS(th)
Gate Threshold Voltage
2.0
–––
4.0
V
VDS = 10V, ID = 250µA
gfs
Forward Transconductance
69
–––
–––
S
VDS = 25V, ID = 110A
–––
–––
20
µA
VDS = 55V, VGS = 0V
–––
–––
250
VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage
–––
–––
200
VGS = 20V
Gate-to-Source Reverse Leakage
–––
–––
-200
nA
VGS = -20V
Qg
Total Gate Charge
–––
170
260
ID = 101A
Qgs
Gate-to-Source Charge
–––
44
66
nC
VDS = 44V
Qgd
Gate-to-Drain ("Miller") Charge
–––
62
93
VGS = 10V
„
td(on)
Turn-On Delay Time
–––
13
–––
VDD = 38V
tr
Rise Time
–––
190
–––
ID = 110A
td(off)
Turn-Off Delay Time
–––
130
–––
RG = 1.1Ω
tf
Fall Time
–––
110
–––
VGS = 10V
„
Between lead,
–––
–––
6mm (0.25in.)
from package
and center of die contact
Ciss
Input Capacitance
–––
5480 –––
VGS = 0V
Coss
Output Capacitance
–––
1210 –––
pF
VDS = 25V
Crss
Reverse Transfer Capacitance
–––
280
–––
ƒ = 1.0MHz, See Fig. 5
Coss
Output Capacitance
–––
5210 –––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss
Output Capacitance
–––
900
–––
VGS = 0V, VDS = 44V, ƒ = 1.0MHz
Coss eff.
Effective Output Capacitance
…
–––
1500 –––
VGS = 0V, VDS = 0V to 44V
nH
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
LD
Internal Drain Inductance
LS
Internal Source Inductance
–––
–––
S
D
G
IGSS
ns
4.5
7.5
IDSS
Drain-to-Source Leakage Current
S
D
G
Parameter
Min. Typ. Max. Units
Conditions
IS
Continuous Source Current
MOSFET symbol
(Body Diode)
–––
–––
showing the
ISM
Pulsed Source Current
integral reverse
(Body Diode)

–––
–––
p-n junction diode.
VSD
Diode Forward Voltage
–––
–––
1.3
V
TJ = 25°C, IS = 101A, VGS = 0V
„
trr
Reverse Recovery Time
–––
88
130
ns
TJ = 25°C, IF = 101A
Qrr
Reverse RecoveryCharge
–––
250
380
nC
di/dt = 100A/µs
„
ton
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Source-Drain Ratings and Characteristics
131
†
680
A
 3 page
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3
Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
1
10
100
1000
0.1
1
10
100
20µs PULSE WIDTH
T = 25 C
J
°
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V
, Drain-to-Source Voltage (V)
DS
4.5V
10
100
1000
0.1
1
10
100
20µs PULSE WIDTH
T = 175 C
J
°
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V
, Drain-to-Source Voltage (V)
DS
4.5V
1
10
100
1000
4
6
8
10
12
V
= 25V
20µs PULSE WIDTH
DS
V
, Gate-to-Source Voltage (V)
GS
T = 25 C
J
°
T = 175 C
J
°
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
0.0
0.5
1.0
1.5
2.0
2.5
3.0
T , Junction Temperature ( C)
J
°
V
=
I =
GS
D
10V
169A
 4 page
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4
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Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
0
60
120
180
240
300
0
4
8
12
16
20
Q , Total Gate Charge (nC)
G
FOR TEST CIRCUIT
SEE FIGURE
I =
D
13
101A
V
= 27V
DS
V
= 44V
DS
1
10
100
1000
0.0
0.5
1.0
1.5
2.0
2.5
3.0
V
,Source-to-Drain Voltage (V)
SD
V
= 0 V
GS
T = 25 C
J
°
T = 175 C
J
°
1
10
100
1000
10000
1
10
100
OPERATION IN THIS AREA LIMITED
BY RDS(on)
Single Pulse
T
T
= 175 C
= 25 C
°
°
J
C
V
, Drain-to-Source Voltage (V)
DS
10us
100us
1ms
10ms
1
10
100
VDS, Drain-to-Source Voltage (V)
100
1000
10000
100000
Coss
Crss
Ciss
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds+ Cgd
 5 page
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5
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
VDS
90%
10%
VGS
td(on)
tr
td(off) tf
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
10V
+
-V
DD
Fig 10a. Switching Time Test Circuit
Fig 10b. Switching Time Waveforms
25
50
75
100
125
150
175
0
40
80
120
160
T , Case Temperature ( C)
°
C
LIMITED BY PACKAGE
0.001
0.01
0.1
1
0.00001
0.0001
0.001
0.01
0.1
1
Notes:
1. Duty factor D =
t / t
2. Peak T = P
x Z
+ T
1
2
J
DM
thJC
C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
1
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
 6 page
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6
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QG
QGS
QGD
VG
Charge
D.U.T.
VDS
ID
IG
3mA
VGS
.3
µF
50K
.2
µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V(BR)DSS
IAS
R G
IAS
0.01
tp
D.U.T
L
VDS
+
-
VDD
DRIVER
A
15V
20V
Fig 14. Threshold Voltage Vs. Temperature
25
50
75
100
125
150
175
0
200
400
600
800
1000
1200
1400
Starting T , Junction Temperature ( C)
J
°
ID
TOP
BOTTOM
41A
71A
101A
-75
-50
-25
0
25
50
75
100 125 150 175
TJ , Temperature ( °C )
1.5
2.0
2.5
3.0
3.5
4.0
ID = 250µA
 7 page
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7
Fig 15. Typical Avalanche Current Vs.Pulsewidth
Fig 16. Maximum Avalanche Energy
Vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7.
∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2
DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
1.0E-07
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E+00
tav (sec)
0.1
1
10
100
1000
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs
avalanche
pulsewidth,
tav
assuming
∆ Tj = 25°C due to
avalanche losses
0.01
25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
0
100
200
300
400
500
600
TOP
Single Pulse
BOTTOM 10% Duty Cycle
ID = 101A
 8 page
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IRF1405S/LPbF
8
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Peak Diode Recovery dv/dt Test Circuit
P.W.
Period
di/dt
Diode Recovery
dv/dt
Ripple
≤ 5%
Body Diode
Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
VGS=10V
VDD
ISD
Driver Gate Drive
D.U.T. ISD Waveform
D.U.T. VDS Waveform
Inductor Curent
D =
P.W.
Period
+
-
+
+
+
-
-
-
ƒ
„
‚
RG
VDD
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
*
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer

* Reverse Polarity of D.U.T for P-Channel
VGS
[ ]
[ ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
[
] ***
Fig 17. For N-channel HEXFET® power MOSFETs
 9 page
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9
D2Pak Part Marking Information
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
Note: "P" in as s embly line
pos ition indicates "L ead-F ree"
F 530S
T HIS IS AN IR F 530S WIT H
L OT CODE 8024
AS S E MB L E D ON WW 02, 2000
IN T HE AS S E MB LY LINE "L "
ASSE MB L Y
LOT CODE
INT E R NAT IONAL
RE CT IF IER
LOGO
PAR T NU MB E R
DAT E CODE
YE AR 0 = 2000
WEE K 02
LINE L
OR
F 530S
A = AS S EMB LY S IT E CODE
WE EK 02
P = DE S IGNAT E S LE AD-F RE E
PR ODU CT (OPT IONAL )
RECT IF IER
INT E RNAT IONAL
LOGO
LOT CODE
AS S E MB L Y
YEAR 0 = 2000
DAT E CODE
PART NU MB ER
 10 page
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10
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TO-262 Part Marking Information
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
ASSEMBLY
LOT CODE
RECTIF IER
INT ERNATIONAL
AS S EMB LED ON WW 19, 1997
Note: "P" in assembly line
position indicates "Lead-Free"
IN THE AS S EMBLY LINE "C"
LOGO
T HIS IS AN IRL3103L
LOT CODE 1789
EXAMPLE:
LINE C
DATE CODE
WEE K 19
YE AR 7 = 1997
PART NUMBER
PART NUMBER
LOGO
LOT CODE
AS S EMBLY
INTERNATIONAL
RECT IF IER
PRODUCT (OPTIONAL)
P = DES IGNATES LEAD-F REE
A = ASSEMBLY SIT E CODE
WEEK 19
YEAR 7 = 1997
DAT E CODE
OR




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