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MC74LCX86_12 데이터시트(Datasheet) 1 Page - ON Semiconductor |
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Semiconductor Components Industries, LLC, 2012 October, 2012 − Rev. 8 Publication Order Number: MC74LCX86/D 1 MC74LCX86 Low-Voltage CMOS Quad 2-Input XOR Gate With 5 V−Tolerant Inputs The MC74LCX86 is a high performance, quad 2−input XOR gate operating from a 2.3 to 3.6 V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5 V allows MC74LCX86 inputs to be safely driven from 5.0 V devices. Current drive capability is 24 mA at the outputs. Features Designed for 2.3 to 3.6 V VCC Operation 5.0 V Tolerant Inputs − Interface Capability With 5.0 V TTL Logic LVTTL Compatible LVCMOS Compatible 24 mA Balanced Output Sink and Source Capability Near Zero Static Supply Current (10 mA) Substantially Reduces System Power Requirements Latchup Performance Exceeds 500 mA ESD Performance: Human Body Model >2000 V Machine Model >200 V These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant TSSOP−14 DT SUFFIX CASE 948G 14 1 SOIC−14 D SUFFIX CASE 751A 14 1 MARKING DIAGRAMS See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. ORDERING INFORMATION http://onsemi.com LCX86G AWLYWW 1 14 LCX 86 ALYWG G 1 14 A = Assembly Location L, WL = Wafer Lot Y, YY = Year W, WW = Work Week G or G = Pb−Free Package (Note: Microdot may be in either location) 2 page 
MC74LCX86 http://onsemi.com 2 PIN NAMES Function Data Inputs Outputs Pins An, Bn On L L H H L H L H Inputs Outputs An Bn L H H L On TRUTH TABLE Figure 1. Pinout: 14−Lead (Top View) 13 14 12 11 10 9 8 2 1 34567 VCC A2 B2 O2 A3 B3 O3 A0 B0 O0 A1 B1 O1 GND 3 O0 1 A0 2 B0 6 O1 4 A1 5 B1 11 O2 13 A2 12 B2 8 O3 10 A3 9 B3 Figure 2. Logic Diagram MAXIMUM RATINGS Symbol Parameter Value Condition Units VCC DC Supply Voltage −0.5 to +7.0 V VI DC Input Voltage −0.5 VI +7.0 V VO DC Output Voltage −0.5 VO VCC + 0.5 Note 1 V IIK DC Input Diode Current −50 VI < GND mA IOK DC Output Diode Current −50 VO < GND mA +50 VO > VCC mA IO DC Output Source/Sink Current 50 mA ICC DC Supply Current Per Supply Pin 100 mA IGND DC Ground Current Per Ground Pin 100 mA TSTG Storage Temperature Range −65 to +150 C MSL Moisture Sensitivity Level 1 Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Output in HIGH or LOW State. IO absolute maximum rating must be observed. 3 page 
MC74LCX86 http://onsemi.com 3 RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Typ Max Units VCC Supply Voltage Operating Data Retention Only 2.0 1.5 3.3 3.3 3.6 3.6 V VI Input Voltage 0 5.5 V VO Output Voltage (HIGH or LOW State) 0 VCC V IOH HIGH Level Output Current, VCC = 3.0 V − 3.6 V −24 mA IOL LOW Level Output Current, VCC = 3.0 V − 3.6 V 24 mA IOH HIGH Level Output Current, VCC = 2.7 V − 3.0 V −12 mA IOL LOW Level Output Current, VCC = 2.7 V − 3.0 V 12 mA TA Operating Free−Air Temperature −40 +85 C Dt/DV Input Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 3.0 V 0 10 ns/V DC ELECTRICAL CHARACTERISTICS TA = −40C to +85C Symbol Characteristic Condition Min Max Units VIH HIGH Level Input Voltage (Note 2) 2.7 V VCC 3.6 V 2.0 V VIL LOW Level Input Voltage (Note 2) 2.7 V VCC 3.6 V 0.8 V VOH HIGH Level Output Voltage 2.7 V VCC 3.6 V; IOH = −100 mA VCC − 0.2 V VCC = 2.7 V; IOH = −12 mA 2.2 VCC = 3.0 V; IOH = −18 mA 2.4 VCC = 3.0 V; IOH = −24 mA 2.2 VOL LOW Level Output Voltage 2.7 V VCC 3.6 V; IOL = 100 mA 0.2 V VCC = 2.7 V; IOL= 12 mA 0.4 VCC = 3.0 V; IOL = 16 mA 0.4 VCC = 3.0 V; IOL = 24 mA 0.55 IOFF Power Off Leakage Current VCC = 0, VIN = 5.5 V or VOUT = 5.5 V 10 mA IIN Input Leakage Current VCC = 3.6 V, VIN = 5.5 V or GND 5 mA ICC Quiescent Supply Current VCC = 3.6 V, VIN = 5.5 V or GND 10 mA DICC Increase in ICC per Input 2.3 VCC 3.6 V; VIH = VCC − 0.6 V 500 mA 2. These values of VI are used to test DC electrical characteristics only. AC CHARACTERISTICS (tR = tF = 2.5ns; CL = 50pF; RL = 500W) Limits TA = −40C to +85C VCC = 3.0 V to 3.6 V VCC = 2.7 V Symbol Parameter Waveform Min Max Max Units tPLH tPHL Propagation Delay Input to Output 1,2 1.5 1.5 6.5 6.5 7.0 7.0 ns tOSHL tOSLH Output−to−Output Skew (Note 3) 1.0 1.0 ns 3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter guaranteed by design. 4 page 
MC74LCX86 http://onsemi.com 4 DYNAMIC SWITCHING CHARACTERISTICS TA = +25C Symbol Characteristic Condition Min Typ Max Units VOLP Dynamic LOW Peak Voltage (Note 4) VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V 0.8 V VOLV Dynamic LOW Valley Voltage (Note 4) VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V 0.8 V 4. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is measured in the LOW state. CAPACITIVE CHARACTERISTICS Symbol Parameter Condition Typical Units CIN Input Capacitance VCC = 3.3 V, VI = 0 V or VCC 7 pF COUT Output Capacitance VCC = 3.3 V, VI = 0 V or VCC 8 pF CPD Power Dissipation Capacitance 10 MHz, VCC = 3.3 V, VI = 0 V or VCC 25 pF ORDERING INFORMATION Device Package Shipping† MC74LCX86DR2G SOIC−14 (Pb−Free) 2500 Tape & Reel MC74LCX86DTR2G TSSOP−14 (Pb−Free) 2500 Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 5 page 
MC74LCX86 http://onsemi.com 5 WAVEFORM 1 - NON-INVERTING PROPAGATION DELAYS tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns 2.7 V 0 V VOH VOL An, Bn On tPHL tPLH 1.5 V 1.5 V 1.5 V 1.5 V Figure 3. AC Waveforms WAVEFORM 2 - INVERTING PROPAGATION DELAYS tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns 2.7 V 0 V VOH VOL An, Bn On tPLH tPHL 1.5 V 1.5 V 1.5 V 1.5 V PULSE GENERATOR RT DUT VCC RL CL CL = 50pF or equivalent (Includes jig and probe capacitance) RL = R1 = 500 W or equivalent RT = ZOUT of pulse generator (typically 50 W) Figure 4. Test Circuit 6 page 
MC74LCX86 http://onsemi.com 6 PACKAGE DIMENSIONS TSSOP−14 CASE 948G ISSUE B DIM MIN MAX MIN MAX INCHES MILLIMETERS A 4.90 5.10 0.193 0.200 B 4.30 4.50 0.169 0.177 C −−− 1.20 −−− 0.047 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC H 0.50 0.60 0.020 0.024 J 0.09 0.20 0.004 0.008 J1 0.09 0.16 0.004 0.006 K 0.19 0.30 0.007 0.012 K1 0.19 0.25 0.007 0.010 L 6.40 BSC 0.252 BSC M 0 8 0 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. ___ _ S U 0.15 (0.006) T 2X L/2 S U M 0.10 (0.004) V S T L −U− SEATING PLANE 0.10 (0.004) −T− SECTION N−N DETAIL E J J1 K K1 DETAIL E F M −W− 0.25 (0.010) 8 14 7 1 PIN 1 IDENT. H G A D C B S U 0.15 (0.006) T −V− 14X REF K N N 7.06 14X 0.36 14X 1.26 0.65 DIMENSIONS: MILLIMETERS 1 PITCH SOLDERING FOOTPRINT* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 7 page 
MC74LCX86 http://onsemi.com 7 PACKAGE DIMENSIONS SOIC−14 NB CASE 751A−03 ISSUE K NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF AT MAXIMUM MATERIAL CONDITION. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSIONS. 5. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. H 14 8 7 1 M 0.25 B M C h X 45 SEATING PLANE A1 A M _ S A M 0.25 B S C b 13X B A E D e DETAIL A L A3 DETAIL A DIM MIN MAX MIN MAX INCHES MILLIMETERS D 8.55 8.75 0.337 0.344 E 3.80 4.00 0.150 0.157 A 1.35 1.75 0.054 0.068 b 0.35 0.49 0.014 0.019 L 0.40 1.25 0.016 0.049 e 1.27 BSC 0.050 BSC A3 0.19 0.25 0.008 0.010 A1 0.10 0.25 0.004 0.010 M 0 7 0 7 H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.019 __ __ 6.50 14X 0.58 14X 1.18 1.27 DIMENSIONS: MILLIMETERS 1 PITCH SOLDERING FOOTPRINT* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 MC74LCX86/D LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative |
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