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STN4260 데이터시트(Datasheet) 1 Page - Stanson Technology

부품명 STN4260
상세내용  N Channel Enhancement Mode MOSFET
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제조사  STANSON [Stanson Technology]
홈페이지  http://www.stansontech.com
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 1 page
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STN4260
N Channel Enhancement Mode MOSFET
18A
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com
Copyright © 2008, Stanson Corp.
STN4260 2016. V1
DESCRIPTION
STN4260 is the N-Channel logic enhancement mode power field effect transistor
which is produced using high cell density. This high density process is especially
tailored to minimize on-state resistance. These devices are particularly suited for low
voltage application such as power management and other battery powered circuits
where high-side switching.
PIN CONFIGURATION
SOP-8
PART MARKING
Y: Year Code
A: Porduce Code
P: Process Code
FEATURE
l
60V/10A, RDS(ON) = 11.5mΩ (Typ.)
@VGS = 10V
l
60V/8A, RDS(ON) = 12.5mΩ
@VGS = 4.5V
l
Super high density cell design for
extremely low RDS(ON)
l
Exceptional on-resistance and
maximum DC current capability
l
SOP-8 package design
 2 page
background image
STN4260
N Channel Enhancement Mode MOSFET
18A
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com
Copyright © 2008, Stanson Corp.
STN4260 2016. V1
ABSOULTE MAXIMUM RATINGS (Ta = 25℃ Unless otherwise noted )
Parameter
Symbol
Typical
Unit
Drain-Source Voltage
VDSS
60
V
Gate-Source Voltage
VGSS
±20
V
Continuous Drain Current
(TJ=150℃)
TA=25℃
TA=70℃
ID
20
14
A
Pulsed Drain Current
IDM
110
A
Continuous Source Current (Diode Conduction)
IS
4.5
A
Power Dissipation
TA=25℃
TA=70℃
PD
3.1
2.0
W
Operation Junction Temperature
TJ
150
Storgae Temperature Range
TSTG
-55/150
Thermal Resistance-Junction to Ambient
RθJA
70
/W
 3 page
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STN4260
N Channel Enhancement Mode MOSFET
18A
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com
Copyright © 2008, Stanson Corp.
STN4260 2016. V1
ELECTRICAL CHARACTERISTICS ( Ta = 25℃ Unless otherwise noted )
Parameter
Symbol
Condition
Min
Typ
Max
Unit
Static
Drain-Source
Breakdown Voltage
V(BR)DSS
VGS=0V,ID=250uA
60
V
Gate Threshold
Voltage
VGS(th)
VDS=VGS,ID=250uA
1.0
2.5
V
Gate Leakage Current
IGSS
VDS=0V,VGS=±20V
±100
nA
Zero Gate Voltage
Drain Current
IDSS
VDS=60V,VGS=0V
1
uA
VDS=60V,VGS=0V
TJ=25℃
5
Drain-source On-
Resistance
RDS(on)
VGS=10V,ID=10A
VGS=4.5V,ID=8A
11.5
12.5
13
14
Forward
Transconductance
gfs
VDS=10V,ID=6A
11.7
S
Diode Forward Voltage
VSD
IS=1A,VGS=0V
0.8
1.0
V
Dynamic
Total Gate Charge
Qg
VDS=30V,VGS=10V
ID≡10A
40
58
nC
Gate-Source Charge
Qgs
6
9
Gate-Drain Charge
Qgd
8.8
14
Input Capacitance
Ciss
VDS =25V,VGS=0V
F=1MHz
2100
pF
Output Capacitance
Coss
165
Reverse
TransferCapacitance
Crss
80
Turn-On Time
td(on)
tr
VDD=15V,
VGS=10V,RG=6Ω
ID=1A
9.5
18
nS
28
54
Turn-Off Time
td(off)
tf
45.3
86
80
120
 4 page
background image
STN4260
N Channel Enhancement Mode MOSFET
18A
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com
Copyright © 2008, Stanson Corp.
STN4260 2016. V1
 5 page
background image
STN4260
N Channel Enhancement Mode MOSFET
18A
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com
Copyright © 2008, Stanson Corp.
STN4260 2016. V1
 6 page
background image
STN4260
N Channel Enhancement Mode MOSFET
18A
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com
Copyright © 2008, Stanson Corp.
STN4260 2016. V1
PACKAGE OUTLINE SOP-8P




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