SLG46140 datasheet(83/170 Pages) DIALOG

부품명	SLG46140

상세설명	GreenPAK Programmable Mixed-signal Matrix

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83 / 170 page

000-0046140-109

Page 82 of 169

SLG46140

12.2.1 3-Bit LUT or D Flip Flop Macrocells Used as 3-Bit LUTs

Each Macrocell, when programmed for a LUT function, uses a 8-bit register to define their output function:

3-Bit LUT4 is defined by reg<906:913>

3-Bit LUT5 is defined by reg<916:923>

12.2.2 3-Bit LUT or D Flip Flop Macrocells Used as D Flip Flop Register Settings

Table 53. DFF2 Register Settings

Signal Function

Register Bit

Address

Register Definition

DFF2 or Latch

Select

reg<906>

0: DFF function

1: Latch function

DFF2 Output Select

reg<907>

0: Q output

1: nQ output

DFF2 nRST/nSET

Select

reg<908>

1: nSET from matrix out

0: nRST from matrix out

DFF2 Initial Polarity

Select

reg<909>

0: Low

1: High

LUT3_4 or DFF2

Select

reg<914>

0: LUT3_4

1: DFF2

Table 54. DFF3 Register Settings

Signal Function

Register Bit

Address

Register Definition

DFF3 or Latch

Select

reg<915>

0: DFF function

1: Latch function

DFF3 Output Select

reg<916>

0: Q output

1: nQ output

DFF3 nRST/nSET

Select

reg<917>

1: nSET from matrix out

0: nRST from matrix out

DFF3 Initial Polarity

Select

reg<918>

0: Low

1: High

LUT3_5 or DFF3

Select

reg<923>

0: LUT3_5

1: DFF3

Table 51. 3-bit LUT4 Truth Table

IN2

IN1

IN0

OUT

0

reg <906>

0

1

reg <907>

0

1

0

reg <908>

0

1

reg <909>

1

0

reg <910>

101

reg <911>

1

0

reg <912>

1

reg <913>

Table 52. 3-bit LUT4 Truth Table

IN2

IN1

IN0

OUT

0

reg <916>

0

1

reg <917>

0

1

0

reg <918>

0

1

reg <919>

1

0

reg <920>

1

0

1

reg <921>

1

0

reg <922>

1

reg <923>

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