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4 / 20 page 000-000C55545-101 Page 4 of 20 SLGC55545 1. For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 2. The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as specified in JESD51-7, in an environment described in JESD51-2a. 3. The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88. 4. The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB temperature, as described in JESD51-8. 5. The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7). 6. The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7). 7. The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88. Thermal Information1 Parameter Typical Unit θJA Junction-to-ambient thermal resistance 2 53.4 °C/W θJCtop Junction-to-case (top) thermal resistance 3 51.4 °C/W θJB Junction-to-board thermal resistance 4 17.2 °C/W ψJT Junction-to-top characterization parameter 5 3.7 °C/W ψJB Junction-to-board characterization parameter 6 20.7 °C/W θJCbot Junction-to-case (bottom) thermal resistance 7 3.9 °C/W Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) Symbol Parameter Condition/Note Min. Typ. Max. Unit VIN Input Voltage VIN 4.5 -- 5.5 V Logic Level Inputs (CTL1, CTL2, CTL3, EN, ILIM_SEL) 0 -- 5.5 V Data Line Inputs (DP_IN, DM_IN, DP_OUT, DM_OUT) -- -- 5.5 V Continuous Current Data Line inputs (SDP or CDP mode, DP_IN to DP_OUT or DM_IN to DM_OUT) -- -- ±30 mA Data Line inputs (BC1.2 DCP mode, DP_IN to DM_IN) -- -- ±15 mA RILIM Current-limit set resistors ILIM_L to GND, ILIM_H to GND 16.9 -- 750 k Ω TJ Operating virtual junction temperature -40 -- 125 °C VIH Input Logic High 1.8 -- -- V VIL Input Logic Low -- -- 0.8 V VHYST Input Logic Hysteresis -- 250 -- mV |
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