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MTV312M64 데이터시트(PDF) 8 Page - List of Unclassifed Manufacturers |
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MTV312M64 데이터시트(HTML) 8 Page - List of Unclassifed Manufacturers |
8 / 26 page MYSON TECHNOLOGY MTV312M64 (Rev 0.95) Revision 0.95 - 8 - 2001/07/03 COP10 = 1 → Pin “P1.0”is CMOS Output. = 0 → Pin “P1.0”is 8051 standard I/O. OPTION (w): Chip option configuration (All are "0" in Chip Reset). PWMF = 1 → Selects 94KHz PWM frequency. = 0 → Selects 47KHz PWM frequency. DIV253 = 1 → PWM pulse width is 253 step resolution. = 0 → PWM pulse width is 256 step resolution. FclkE = 1 → CPU is running at double rate = 0 → CPU is running at normal rate ENSCL = 1 → Enables slave IIC block to hold HSCL pin low while MTV212M64i is unable to Catch-up the external master's speed. Msel = 1 → Master IIC block connected to HSCL/HSDA pins. = 0 → Master IIC block connected to ISCL/ISDA pins. MIICF1,MIICF0 = 1,1 → Selects 400KHz Master IIC frequency. = 1,0 → Selects 200KHz Master IIC frequency. = 0,1 → Selects 50KHz Master IIC frequency. = 0,0 → Selects 100KHz Master IIC frequency. 4. I/O Ports 4.1 Port1 Port1 is a group of pseudo open drain pins or CMOS output pins. It can be used as general purpose I/O. Behavior of Port1 is the same as standard 8051. 4.2 P3.0-2, P3.4-5 If these pins are not set as IIC pins, Port3 can be used as general purpose I/O, interrupt, UART and Timer pins. Behavior of Port3 is the same as standard 8051. 4.3 Port4, Port5 and Port6 Port5 and Port6 are used as general purpose I/O. S/W needs to set the corresponding P5(n)oe and P6(n)oe to define whether these pins are input or output. Port4 is pure output. Reg name addr bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 PORT5 F30h(r/w) P50 PORT5 F31h(r/w) P51 PORT5 F32h(r/w) P52 PORT5 F33h(r/w) P53 PORT5 F34h(r/w) P54 PORT5 F35h(r/w) P55 PORT5 F36h(r/w) P56 PORT6 F38h(r/w) P60 PORT6 F39h(r/w) P61 PORT6 F3Ah(r/w) P62 PORT6 F3Bh(r/w) P63 PORT6 F3Ch(r/w) P64 PORT6 F3Dh(r/w) P65 PORT6 F3Eh(r/w) P66 PORT6 F3Fh(r/w) P67 PORT4 F58h(w) P40 PORT4 F59h(w) P41 PORT4 F5Ah(w) P42 |
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