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SN74AS866A 데이터시트(PDF) 1 Page - Texas Instruments |
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SN74AS866A 데이터시트(HTML) 1 Page - Texas Instruments |
1 / 7 page SN54AS866, SN74AS866A 8-BIT MAGNITUDE COMPARATORS SDAS183A – DECEMBER 1982 – REVISED JUNE 1990 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Copyright © 1990, Texas Instruments Incorporated 1 • Package Options Include Plastic Small Outline Packages, Both Plastic and Ceramic Chip Carriers, and Standard Plastic and Ceramic DIPs • Input and Output Latches with Active-High Enables • Fast Compare to Zero • Arithmetic and Logical Comparison • Open-Collector P = Q Output description These Advanced Schottky devices are capable of performing high-speed arithmetic or logical comparisons on two 8-bit binary or two’s complement words. Three fully decoded decisions about words P and Q are externally available at the outputs. These devices are fully expandable to any word length by connecting the totem pole P>Q and P<Q outputs of each stage to the P>Q and P<Q inputs of the next higher-order stage. The cascading paths are implemented with only a two-gate-level delay to reduce overall comparison times for long words. The open- collector P=Q output may be wire-ANDed together. Both input words P and Q plus all three outputs (P>Q, P<Q, and P = Q) are equipped with latches to provide the designer with temporary data storage for avoiding race conditions. The enable circuitry is implemented with minimal delay times to enhance performance when the devices are cascaded for longer word lengths. Each latch is transparent when the appropriate latch enable, PLE, QLE, or OLE is high. The enable inputs PLE and QLE and data inputs P and Q utilize pnp input transistors to reduce the low-level input current requirement to typically – 0.25 mA, which minimizes loading effects. The Q register may be cleared to zero for a fast comparison of the P word to zero. The SN54AS866 is characterized for operation over the full military temperature range of – 55 °C to 125°C. The SN74AS866A is characterized for operation from 0 °C to 70°C. SN54AS866 ...JD PACKAGE SN74AS866A ...N PACKAGE (TOP VIEW) SN54AS866 . . . FK PACKAGE SN74AS866A . . . FN PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 QLE L/A p < Qin P > Qin Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 P = Qout GND VCC CLRQ PLE P7 P6 P5 P4 P3 P2 P1 P0 P < Qout P > Qout OLE 32 1 13 14 5 6 7 8 9 10 11 P7 P6 P5 P4 P3 P2 P1 Q7 Q6 Q5 Q4 Q3 Q2 Q1 4 15 16 17 18 28 27 26 25 24 23 22 21 20 19 12 UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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