Contents
xi
4.56
Register 195 (0x0C3) Host SDRAM Write Data [7:0]
4-41
4.57
Registers 196–198 (0x0C4–0x0C6)
Host SDRAM Target Address [18:0]
4-42
4.58
Registers 199–201 (0x0C7–0x0C9)
Host SDRAM Source Address [18:0]
4-42
4.59
Registers 202 and 203 (0x0CA and 0x0CB)
Block Transfer Count [15:0]
4-43
4.60
Register 204 (0x0CC)
4-43
4.61
Register 205 (0x0CD)
4-44
4.62
Register 206 (0x0CE)
4-45
4.63
Registers 207–212 (0x0CF–0x0D4)
4-45
4.64
Registers 213–215 (0xD5–0x0D7)
DMA SDRAM Target Address [18:0]
4-46
4.65
Registers 216–218 (0xD8–0x0DA)
DMA SDRAM Source Address [18:0]
4-46
4.66
Register 219 (0x0DB) DMA SDRAM Read Data [7:0]
4-47
4.67
Register 220 (0x0DC) DMA SDRAM Write Data [7:0]
4-47
4.68
Register 221 (0x0DD)
4-47
4.69
Registers 222 and 223 (0x0DE and 0x0DF)
VCO Test Low Freq [15:8]
4-47
4.70
Registers 224 and 225 (0x0E0 and 0x0E1)
Anchor Luma Frame Store 1 Base Address [15:0]
4-48
4.71
Registers 226 and 227 (0x0E2 and 0x0E3)
Anchor Chroma Frame Store 1 Base Address [15:0]
4-48
4.72
Registers 228 and 229 (0x0E4 and 0x0E5)
Anchor Luma Frame Store 2 Base Address [15:0]
4-48
4.73
Registers 230 and 231 (0x0E6 and 0x0E7)
Anchor Chroma Frame Store 2 Base Address [15:0]
4-49
4.74
Registers 232 and 233 (0x0E8 and 0x0E9)
B Luma Frame Store Base Address [15:0]
4-49
4.75
Registers 234 and 235 (0x0EA and 0x0EB)
B Chroma Frame Store Base Address [15:0]
4-49
4.76
Register 236 (0x0EC)
4-50
4.77
Register 237 (0x0ED)
4-51
4.78
Register 238 (0x0EE)
4-52
4.79
Register 239 (0x0EF)
4-54
4.80
Register 240 (0x0F0)
4-56
4.81
Register 241 (0x0F1)
4-56
4.82
Register 242 (0x0F2) Q Table Entry [7:0]
4-57