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CS42406-CQZ 데이터시트(PDF) 7 Page - Cirrus Logic |
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CS42406-CQZ 데이터시트(HTML) 7 Page - Cirrus Logic |
7 / 50 page CS42406 7 DAC_FILT+ 21 Positive Voltage Reference ( Output) - Positive reference voltage for the internal sampling circuits. DAC_VQ 22 Quiescent Voltage ( Output) - Filter connection for internal quiescent voltage. AINL AINR 24 26 Analog Inputs (Input) - The full scale analog input level is specified in the “ADC Analog Character- istics (CS42406-CQZ)” on page 14. ADC_VQ 25 Quiescent Voltage ( Output) - Filter connection for internal quiescent voltage. AOUTB3 AOUTA3 AOUTB2 AOUTA2 AOUTB1 AOUTA1 29 30 36 37 39 40 Analog Outputs ( Output) - The full scale analog line output level is specified in the “DAC Analog Characteristics (CS42406-CQZ)” on page 9. MUTEC3 MUTEC2 MUTEC1 28 38 41 Mute Control ( Output) - Control signals for optional mute circuit. VA 32 Analog Power ( Input) - Positive power supply for the analog section. ADC_FILT+ 34 Positive Voltage Reference ( Output) - Positive reference voltage for the internal sampling circuits. ADC_M1 ADC_M0 43 44 ADC Mode Selection ( Input) - Determines the operational speed mode of the ADC. SDIN1 SDIN2 SDIN3 46 47 48 Serial Audio Data Input ( Input) - Input for two’s complement serial audio data. DAC Control Port Definitions SCL/CCLK 13 Serial Control Port Clock ( Input) - Serial clock for the control port interface. SDA/CDIN 14 Serial Control Data I/O ( Input/Output) - Input/Output for I²C data. Input for SPI data. AD0/CS 15 Address Bit / Chip Select ( Input) - Chip address bit in I²C Mode. Control signal used to select the chip in SPI mode. DAC Stand Alone Defini- tions DIF1 DIF0 13 14 Digital Interface Format ( Input) - Defines the required relationship between the Left Right Clock, Serial Clock and Serial Audio Data for the DAC. DAC_M0 DAC_M1 15 17 Mode Selection ( Input) - Determines the operational speed mode of the DAC. |
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유사한 설명 - CS42406-CQZ |
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