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CS4385-CQZ 데이터시트(PDF) 4 Page - Cirrus Logic |
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CS4385-CQZ 데이터시트(HTML) 4 Page - Cirrus Logic |
4 / 56 page CS4385 4 DS671A1 1. PIN DESCRIPTION Pin Name # Pin Description VD 4 Digital Power (Input) - Positive power supply for the digital section. Refer to the Recommended Operat- ing Conditions for appropriate voltages. GND 5 31 Ground (Input) - Ground reference. Should be connected to analog ground. MCLK 6 Master Clock (Input) - Clock source for the delta-sigma modulator and digital filters. Tables 1-3 illustrate several standard audio sample rates and the required master clock frequency. LRCK 7 Left Right Clock (Input) - Determines which channel, Left or Right, is currently active on the serial audio data line. The frequency of the left/right clock must be at the audio sample rate, Fs. SDIN1 SDIN2 SDIN3 SDIN4 8 11 13 14 Serial Audio Data Input (Input) - Input for two’s complement serial audio data. SCLK 9 Serial Clock (Input) - Serial clock for the serial audio interface. VLC 18 Control Port Power (Input) - Determines the required signal level for the control port. Refer to the Rec- ommended Operating Conditions for appropriate voltages. RST 19 Reset (Input) - The device enters a low power mode and all internal registers are reset to their default settings when low. FILT+ 20 Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits. Requires the capacitive decoupling to analog ground, as shown in the Typical Connection Diagram. GND AOUTB2- AOUTA3+ AOUTB3- AOUTB2+ VA AOUTA3- AOUTB3+ AOUTA4- AOUTA4+ 6 2 4 8 10 1 3 5 7 9 11 12 13 14 15 16 17 18 19 20 21 22 23 24 31 35 33 29 27 36 34 32 30 28 26 25 48 47 46 45 44 43 42 41 40 39 38 37 MCLK DSDB1 VD SDIN1 M4(TST) DSDA2 DSDA1 GND SCLK SDIN2 M3(TST) LRCK CS4385 AOUTA2+ AOUTA2- |
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