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High Speed Super Low Power SRAM
128K-Word By 8 Bit
CS18LV10245
Rev. 1.2
Copyright 2004 March Chiplus Semiconductor Corp. All rights reserved. .
P 7
AC ELECTRICAL CHARACTERISTICS ( TA = 0 to + 70oC , Vcc = 5.0V )
< READ CYCLE >
-55
-70
JEDEC
Parameter
Name
Parameter
Name
Description
MIN MAX MIN MAX
Unit
tAVAX
tRC
Read Cycle Time
55
70
ns
tAVQV
tAA
Address Access Time
55
70
ns
tELQV
tACS1 Chip Select Access Time (/CE)
55
70
ns
tELQV
tACS2 Chip Select Access Time (CE2)
55
70
ns
tGLQV
tOE
Output Enable to Output Valid
20
30
ns
tE1LQX
tCLZ1
Chip Select to Output Low Z (/CE)
10
10
ns
tE2LOX
tCLZ2
Chip Select to Output Low Z (CE2)
10
10
ns
tGLQX
tOLZ
Output Enable to Output in Low Z
5
5
ns
tEHQZ
tCHZ1
Chip Deselect to Output in High Z (/CE)
0
25
0
30
ns
tEHQZ
tCHZ2
Chip Deselect to Output in High Z (CE2)
0
25
0
30
ns
tGHQZ
tOHZ
Output Disable to Output in High Z
0
25
0
30
ns
tAXOX
tOH
Out Disable to Address Change
10
10
ns