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GD25D20CSEG 데이터시트(PDF) 18 Page - GigaDevice Semiconductor (Beijing) Inc.

부품명 GD25D20CSEG
상세설명  3.3V Uniform Sector Standard and Dual Serial Flash
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제조업체  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
홈페이지  http://www.gigadevice.com/
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3.3V Uniform Sector
Standard and Dual Serial Flash
GD25D40C/20C
18
Figure8. Page Program Sequence Diagram
7.9. Sector Erase (SE) (20H)
The Sector Erase (SE) command is for erasing the all data of the specific sector. A Write Enable (WREN) command
must previously have been executed to set the Write Enable Latch (WEL) bit. The Sector Erase (SE) command is entered
by driving CS# low, followed by the command code, and 3-address byte on SI. Any address inside the sector is a valid
address for the Sector Erase (SE) command. CS# must be driven low for the entire duration of the sequence.
The Sector Erase command sequence: CS# goes low  sending Sector Erase command  3-byte address on SI 
CS# goes high. The command sequence is shown in Figure9. CS# must be driven high after the eighth bit of the last address
byte has been latched in; otherwise the Sector Erase (SE) command is not executed. As soon as CS# is driven high, the
self-timed Sector Erase cycle (whose duration is tSE) is initiated. While the Sector Erase cycle is in progress, the Status
Register is accessed to check the value of the Write In Progress (WIP) bit. The Write In Progress (WIP) bit is 1 during the
self-timed Sector Erase cycle, and becomes 0 when it is completed. At some unspecified time before the cycle is completed,
the Write Enable Latch (WEL) bit is reset. A Sector Erase (SE) command applied to a sector which is protected by the Block
Protect (BP2, BP1, BP0) bit (see Table1) is not executed.
Figure9. Sector Erase Sequence Diagram
Command
0
1
2
3
4
5
6
7
02H
CS#
SCLK
SI
8
9 10
28 29 30 31
3
2
1
0
23 22 21
24-bit address
42 43 44 45
41
46 47
40
50 51 52 53
49
54 55
48
6
5
4
3
2
1
0
7
CS#
SCLK
SI
MSB
Data Byte 2
32 33 34 35
7
6
5
4
3
2
1
0
MSB
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
Data Byte 1
Data Byte 3
Data Byte 256
MSB
MSB
MSB
36 37 38 39
Command
0
1
2
3
4
5
6
7
20H
CS#
SCLK
SI
8
9
29 30 31
MSB
2
1
0
24 Bits Address
23 22


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