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LM3311SQX 데이터시트(PDF) 8 Page - National Semiconductor (TI) |
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LM3311SQX 데이터시트(HTML) 8 Page - National Semiconductor (TI) |
8 / 29 page Electrical Characteristics Specifications in standard type face are for T J = 25˚C and those with boldface type apply over the full Operating Tempera- ture Range (T J = −40˚C to +125˚C). Unless otherwise specified VIN =LVIN =2.5V. Low Dropout Linear Regulator (LDO) Symbol Parameter Conditions Min (Note 5) Typ (Note 6) Max (Note 5) Units LV IN Input Voltage Range 2.5 7 V V ADJ ADJ Pin Voltage LV IN = 3V and 7V 1.197 1.263 1.289 V I ADJ ADJ Pin Current (Note 9) 28 380 nA %V ADJ/ ∆V IN ADJ Voltage Line Regulation LV IN = 3V to 7V, LDOOUT = 2.8V, no load -2.6 0.032 1.4 % %V ADJ/ ∆I L LDO OUT Load Regulation I OUT = 10mA to 300mA, LVIN = 3.3V, LDO OUT = 2.8V -11.6 2.931 8 % I QL LV IN Quiescent Current Device enabled 290 425 µA Device shut down 10.5 V DO Dropout Voltage 350mA load, LDO OUT = 2.8V 218 409 674 mV V ADJ(LOW) V ADJ Short Circuit Disable Threshold LV IN = 3.3V 0.85 0.9 V Note 1: Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics. Note 2: Under normal operation the VC and CE pins may go to voltages above this value. The maximum rating is for the possibility of a voltage being applied to the pin, however the VC and CE pins should never have a voltage directly applied to them. Note 3: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, θJA, and the ambient temperature, TA. See the Electrical Characteristics table for the thermal resistance of various layouts. The maximum allowable power dissipation at any ambient temperature is calculated using: PD (MAX) = (TJ(MAX) −TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Note 4: The human body model is a 100pF capacitor discharged through a 1.5k Ω resistor into each pin per JEDEC standard JESD22-A114. Note 5: All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are 100% production tested. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL). Note 6: Typical numbers are at 25˚C and represent the most likely norm. Note 7: Duty cycle affects current limit due to ramp generator. Note 8: Current limit at 0% duty cycle. See TYPICAL PERFORMANCE section for Switch Current Limit vs. VIN Note 9: Bias current flows into pin. www.national.com 8 |
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