전자부품 데이터시트 검색엔진 |
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RT2519W 데이터시트(PDF) 6 Page - Richtek Technology Corporation |
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RT2519W 데이터시트(HTML) 6 Page - Richtek Technology Corporation |
6 / 13 page RT2519W 6 DS2519W-00 May 2019 www.richtek.com © Copyright 2019 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Typical Application Circuit Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured under natural convection (still air) at TA = 25°C with the component mounted on a high effective- thermal-conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard. θJC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. The spec. doesn't cover the tolerances from external resistors, and which is not tested at condition of VOUT = 0.8V, 4.5V ≤ VIN ≤ 6V, and 750mA ≤ IOUT ≤ 1A since the power dissipation of the device is totally higher than the maximum rating of the package to lead a thermal shutdown issue. EN FB VOUT RT2519W GND VIN VIN 4.7µF VOUT 1µF COUT R1 R2 1, 2 3 CIN 7, 8 5 4 Enable 2.2V to 6V 10nF CNR NR 6 Note : All input and output capacitance in the suggested parameter mean the effective capacitance. The effective capacitance needs to consider any De-rating Effect like DC bias. |
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