CS42L51-CNZ datasheet(6/83 Pages) CIRRUS

부품명	CS42L51-CNZ

상세설명	Low Power, Stereo CODEC with Headphone Amp

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제조업체	CIRRUS [Cirrus Logic]

홈페이지	http://www.cirrus.com

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DS679A2

CS42L51

LIST OF FIGURES

Figure 1. Typical Connection Diagram (Software Mode) .......................................................................... 10

Figure 2. Typical Connection Diagram (Hardware Mode)......................................................................... 11

Figure 3. Headphone Output Test Load.................................................................................................... 19

Figure 4. Serial Audio Interface Slave Mode Timing................................................................................. 21

Figure 5. TDM Serial Audio Interface Timing ............................................................................................ 21

Figure 6. Serial Audio Interface Master Mode Timing............................................................................... 21

Figure 7. Control Port Timing - I²C ............................................................................................................ 22

Figure 8. Control Port Timing - SPI Format............................................................................................... 23

Figure 9. Analog Input Architecture........................................................................................................... 28

Figure 10. MIC Input Mix w/Common Mode Rejection.............................................................................. 30

Figure 11. Differential Input....................................................................................................................... 30

Figure 12. ALC .......................................................................................................................................... 31

Figure 13. Noise Gate Attenuation............................................................................................................ 32

Figure 14. Output Architecture .................................................................................................................. 33

Figure 15. De-Emphasis Curve................................................................................................................. 33

Figure 16. Beep Configuration Options..................................................................................................... 34

Figure 17. Peak Detect & Limiter .............................................................................................................. 35

Figure 18. Master Mode Timing ................................................................................................................ 38

Figure 19. Tri-State Serial Port ................................................................................................................. 38

Figure 20. I²S Format ................................................................................................................................ 39

Figure 21. Left-Justified Format ................................................................................................................ 39

Figure 22. Right-Justified Format (DAC only) ........................................................................................... 39

Figure 23. Initialization Flow Chart............................................................................................................ 41

Figure 24. Control Port Timing in SPI Mode ............................................................................................. 42

Figure 25. Control Port Timing, I²C Write.................................................................................................. 43

Figure 26. Control Port Timing, I²C Read.................................................................................................. 43

Figure 27. AIN & PGA Selection ............................................................................................................... 53

Figure 28. THD+N vs. Ouput Power per Channel at 1.8 V (16

Ω load) .................................................... 72

Figure 29. THD+N vs. Ouput Power per Channel at 2.5 V (16

Ω load) .................................................... 72

Figure 30. THD+N vs. Ouput Power per Channel at 1.8 V (32

Ω load) .................................................... 73

Figure 31. THD+N vs. Ouput Power per Channel at 2.5 V (32

Ω load) .................................................... 73

Figure 32. ADC THD+N vs. Frequency w/Capacitor Effects..................................................................... 74

Figure 33. ADC Passband Ripple ............................................................................................................. 78

Figure 34. ADC Stopband Rejection ......................................................................................................... 78

Figure 35. DAC Passband Ripple ............................................................................................................. 78

Figure 36. DAC Stopband ......................................................................................................................... 78

Figure 35. DAC Transition Band ............................................................................................................... 78

Figure 36. DAC Transition Band (Detail)................................................................................................... 78

Figure 35. ADC Transition Band ............................................................................................................... 78

Figure 36. ADC Transition Band (Detail)................................................................................................... 78

유사한 부품 번호 - CS42L51-CNZ

제조업체	부품명	데이터시트	상세설명
Cirrus Logic	CS42L51-CNZ	1Mb / 88P	Low Power, Stereo CODEC with Headphone Amp
Cirrus Logic	CS42L51-CNZR	1Mb / 88P	Low Power, Stereo CODEC with Headphone Amp

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유사한 설명 - CS42L51-CNZ

제조업체	부품명	데이터시트	상세설명
Cirrus Logic	CS42L51	1Mb / 88P	Low Power, Stereo CODEC with Headphone Amp
Freescale Semiconductor...	SGTL5000XNAA3R2	1Mb / 68P	Low Power Stereo Codec with Headphone Amp
	SGTL5000	1Mb / 68P	Low Power Stereo Codec with Headphone Amp
	SGTL5000XNAA3	1Mb / 84P	Low Power Stereo Codec with Headphone Amp
NXP Semiconductors	SGTL5000	3Mb / 68P	Low Power Stereo Codec with Headphone Amp Rev. 6.0, 11/2013
Cirrus Logic	CS42L50	1Mb / 48P	Low Voltage, Stereo CODEC with headphone Amp
Cirrus Logic	CS42L56	3Mb / 92P	Ultralow Power, Stereo Codec with Class H Headphone Amp Version 2.1, January 2000
Protek Devices	PA5155	734Kb / 27P	Low Power Stereo Audio CODEC With Headphone Amplifier
Suzhou Everest Semicond...	ES8328	527Kb / 37P	Low Power Stereo Audio CODEC With Headphone Amplifier Revision 1.0
Suzhou Everest Semicond...	ES8388	830Kb / 36P	Low Power Stereo Audio CODEC With Headphone Amplifier

More results

CS42L51-CNZ 데이터시트(PDF) 6 Page - Cirrus Logic

CS42L51-CNZ 데이터시트(HTML) 6 Page - Cirrus Logic

유사한 부품 번호 - CS42L51-CNZ

유사한 설명 - CS42L51-CNZ

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