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CD74HC32EE4 데이터시트(PDF) 1 Page - Texas Instruments |
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CD74HC32EE4 데이터시트(HTML) 1 Page - Texas Instruments |
1 / 11 page 1 Data sheet acquired from Harris Semiconductor SCHS274C Features • Typical Propagation Delay: 7ns at VCC = 5V, CL = 15pF, TA = 25 oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to 125oC • Balanced Propagation Delay and Transition Times • Significant Power Reduction Compared to LSTTL Logic ICs • HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V • HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH Description The ’HC32 and ’HCT32 contain four 2-input OR gates in one package. Logic gates utilize silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of standard CMOS integrated cir- cuits. All devices have the ability to drive 10 LSTTL loads. The HCT logic family is functionally pin compatible with the standard LS logic family. Pinout CD54HC32, CD54HCT32 (CERDIP) CD74HC32, CD74HCT32 (PDIP, SOIC) TOP VIEW Ordering Information PART NUMBER TEMP. RANGE (oC) PACKAGE CD54HC32F3A -55 to 125 14 Ld CERDIP CD54HCT32F3A -55 to 125 14 Ld CERDIP CD74HC32E -55 to 125 14 Ld PDIP CD74HC32M -55 to 125 14 Ld SOIC CD74HC32MT -55 to 125 14 Ld SOIC CD74HC32M96 -55 to 125 14 Ld SOIC CD74HCT32E -55 to 125 14 Ld PDIP CD74HCT32M -55 to 125 14 Ld SOIC CD74HCT32MT -55 to 125 14 Ld SOIC CD74HCT32M96 -55 to 125 14 Ld SOIC NOTE: When ordering, use the entire part number. The suffix 96 denotes tape and reel. The suffix T denotes a small-quantity reel of 250. 1A 1B 1Y 2A 2B 2Y GND VCC 4B 4A 4Y 3B 3A 3Y 1 2 3 4 5 6 7 14 13 12 11 10 9 8 September 1997 - Revised September 2003 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2003, Texas Instruments Incorporated. CD54HC32, CD74HC32, CD54HCT32, CD74HCT32 High-Speed CMOS Logic Quad 2-Input OR Gate [ /Title (CD54 HCT32 , CD74 HC32, CD74 HCT32 ) /Sub- ject (High |
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