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UC2843BDR2 데이터시트(PDF) 11 Page - ON Semiconductor |
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UC2843BDR2 데이터시트(HTML) 11 Page - ON Semiconductor |
11 / 20 page UC3842B, UC3843B, UC2842B, UC2843B, NCV3843BV http://onsemi.com 11 Figure 20. Continuous Current Waveforms 2(3) EA Bias + Osc R R R 2R 5(9) 1(1) 4(7) 8(14) RT CT Vref 0.01 The diode clamp is required if the Sync amplitude is large enough to cause the bottom side of CT to go more than 300 mV below ground. External Sync Input 47 + R R R 2R Bias Osc EA 5(9) 1(1) 2(3) 4(7) 8(14) To Additional UCX84XBs R S Q 8 4 6 5 2 1 C 3 7 RA RB 5.0k 5.0k 5.0k MC1455 f + 1.44 (RA ) 2RB)C D(max) + RB RA ) 2RB + - 5.0V Ref + - S R Q Bias + Osc R R R 2R EA 1.0V 5(9) 7(11) 6(10) 5(8) 3(5) RS Q1 VCC Vin 1(1) 2(3) 4(7) 8(14) R1 VClamp R2 7(12) Comp/Latch 1.0 mA Ipk(max) [ VClamp RS Where: 0 ≤ VClamp ≤ 1.0 V VClamp ≈ 1.67 R2 R1 ) 1 + 0.33x10-3 R1R2 R1 ) R2 Control Voltage Inductor Current Oscillator Period Control Voltage Inductor Current Oscillator Period (A) (B) m1 m2 t0 t1 t2 t3 m3 m2 t4 t5 t6 ∆I m1 ∆I Dl ) Dl m2 m1 Dl ) Dl m2 m1 m2 m1 Figure 21. External Clock Synchronization Figure 22. External Duty Cycle Clamp and Multi–Unit Synchronization Figure 23. Adjustable Reduction of Clamp Level |
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