GS882Z18/36BB/D-333/300/250/200/150

Rev: 1.02 10/2004

6/34

© 2001, GSI Technology

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS882Z18/36B BGA Pin Description

Symbol

Type

Description

I

Address field LSBs and Address Counter Preset Inputs

A

I

Address Inputs

I/O

Data Input and Output pins

I

NC

—

No Connect

CK

I

Clock Input Signal; active high

CKE

I

Clock Enable; active low

W

I

Write Enable; active low

I

Chip Enable; active low

I

Chip Enable; active low

I

Chip Enable; active high

G

I

Output Enable; active low

ADV

I

Burst address counter advance enable; active high

ZZ

I

Sleep mode control; active high

FT

I

Flow Through or Pipeline mode; active low

LBO

I

Linear Burst Order mode; active low

ZQ

I

FLXDrive Output Impedance Control (Low = Low Impedance [High Drive], High = High Impedance [Low

Drive])

TMS

I

Scan Test Mode Select

TDI

I

Scan Test Data In

TDO

O

Scan Test Data Out

TCK

I

Scan Test Clock

MCH

—

Must Connect High

DNU

—Do Not Use

I

Core power supply

I

I/O and Core Ground

I

Output driver power supply