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LC72720NM 데이터시트(PDF) 6 Page - Sanyo Semicon Device

부품명 LC72720NM
상세설명  Single-Chip RDS Signal-Processing System LSI
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제조업체  SANYO [Sanyo Semicon Device]
홈페이지  https://www.sanyo-av.com/us/
Logo SANYO - Sanyo Semicon Device

LC72720NM 데이터시트(HTML) 6 Page - Sanyo Semicon Device

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No. 5877-6/14
LC72720N, 72720NM
3. Consecutive RAM readout possible flag (1 bit): RE
RE
RAM data information
1
The next data to be read out is in RAM.
0
This data item is the last item in RAM, and the next data is not present.
ARI
SK signal
1
Detected
0
Not detected
4. RAM data remaining flag (2 bits): RF0, RF1
Note: This value is meaningful only when RE is 1. When RE is 0, there is no data in RAM, even if RF is 00.
If a synchronization reset was applied using SYR, then the backward protection block data that was written to memory is also counted in this value.
Note: This flag indicates the synchronization state of the circuit at the point where the data block being output was received.
On the other hand, the SYNC pin (pin 18) output indicates the current synchronization state of the circuit.
Note: If the number of errors exceeds the value of the EC0 to EC2 setting (see the section on the CCB input format), the error information flags will be set to
the “Correction not possible” value.
Take the data as invalid when EC0 - EC2 = 011 (correction not possible).
RF1
RF0
Remaining data in RAM (number of blocks)
0
0
1 to 7
0
1
8 to 15
1
0
16 to 23
1
1
24
5. ARI (SK) detection flag (1 bit): ARI
SYC
Synchronization detection
1
Synchronized
0
Not synchronized
6. Synchronization established flag (1 bit): SYC
7. Error information flags (3 bits): E0 to E2
8. RDS data (16 bits): D0 to D15
This data is output with the MSB first and the LSB last.
Caution: When error correction was not possible, the input data is output without change.
E
E
E
Number of
2
1
0
bits corrected
0
0
0
0 (no errors)
0
0
1
1
0
1
0
2
0
1
1
3
1
0
0
4
1
0
1
5
1
1
0 Correction not possible
1
1
1
Unused


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