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SSY39V800904IEK 데이터시트(PDF) 18 Page - Silicon Storage Technology, Inc |
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SSY39V800904IEK 데이터시트(HTML) 18 Page - Silicon Storage Technology, Inc |
18 / 20 page 18 Data Sheet 2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A ©2001 Silicon Storage Technology, Inc. S71117-04-000 6/01 360 FIGURE 9: WE# CONTROLLED BLOCK-ERASE TIMING DIAGRAM FIGURE 10: WE# CONTROLLED SECTOR-ERASE TIMING DIAGRAM 360 ILL F17.9 ADDRESS AMS-0 DQ15-0 WE# SW0 SW1 SW2 SW3 SW4 SW5 5555 2AAA 2AAA 5555 5555 XX55 XX50 XX55 XXAA XX80 XXAA BAX OE# CE# SIX-BYTE CODE FOR BLOCK-ERASE TBE TWP Note: This device also supports CE# controlled Block-Erase operation. The WE# and CE# signals are interchageable as long as minimum timings are met. (See Table 16) BAX = Block Address AMS = Most significant address AMS = A16 for SST39LF/VF200A, A17 for SST39LF/VF400A and A18 for SST39LF/VF800A X can be VIL or VIH, but no other value. 360 ILL F18.8 ADDRESS AMS-0 DQ15-0 WE# SW0 SW1 SW2 SW3 SW4 SW5 5555 2AAA 2AAA 5555 5555 XX55 XX30 XX55 XXAA XX80 XXAA SAX OE# CE# SIX-BYTE CODE FOR SECTOR-ERASE TSE TWP Note: This device also supports CE# controlled Sector-Erase operation. The WE# and CE# signals are interchageable as long as minimum timings are met. (See Table 16) SAX = Sector Address AMS = Most significant address AMS = A16 for SST39LF/VF200A, A17 for SST39LF/VF400A and A18 for SST39LF/VF800A X can be VIL or VIH, but no other value. |
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