전자부품 데이터시트 검색엔진 |
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MC100ES6226 데이터시트(PDF) 3 Page - Motorola, Inc |
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MC100ES6226 데이터시트(HTML) 3 Page - Motorola, Inc |
3 / 12 page MC100ES6226 TIMING SOLUTIONS 3 MOTOROLA TABLE 1: PIN CONFIGURATION Pin I/O Type Function CLK, CLK Input LVPECL Differential reference clock signal input OE Input LVCMOS Output enable MR Input LVCMOS Device reset FSEL0, FSEL1 Input LVCMOS Output frequency divider select QA[0-2], QA[0-2] QB[0-2], QB[0-2] QC[0-2], QC[0-2] Output LVPECL Differential clock outputs (banks A, B and C) GND Supply GND Negative power supply VCC Supply VCC Positive power supply. All VCC pins must be connected to the positive power supply for correct DC and AC operation TABLE 2: FUNCTION TABLE Control Default 0 1 OE 0 Qx[0-2], Qx[0-2] are active. Deassertion of OE can be asynchronous to the reference clock without generation of output runt pulses Qx[0-2] = L, Qx[0-2] =H (outputs disabled). Assertion of OE can be asynchronous to the reference clock without generation of output runt pulses MR 0 Normal operation Device reset (asynchronous) FSEL0, FSEL1 00 See Following Table TABLE 3: Output Frequency Select Control FSEL0 FSEL1 QA0 to QA2 QB0 to QB2 QC0 to QC2 0 0 fQA0:2 = fCLK fQB0:2 = fCLK fQC0:2 = fCLK 0 1 fQA0:2 = fCLK fQB0:2 = fCLK fQC0:2 = fCLK ÷ 2 1 0 fQA0:2 = fCLK fQB0:2 = fCLK ÷ 2 fQC0:2 = fCLK ÷ 2 1 1 fQA0:2 = fCLK ÷ 2 fQB0:2 = fCLK ÷ 2 fQC0:2 = fCLK ÷ 2 TABLE 4: ABSOLUTE MAXIMUM RATINGSa Symbol Characteristics Min Max Unit Condition VCC Supply Voltage -0.3 3.6 V VIN DC Input Voltage -0.3 VCC+0.3 V VOUT DC Output Voltage -0.3 VCC+0.3 V IIN DC Input Current ±20 mA IOUT DC Output Current ±50 mA TS Storage temperature -65 125 °C a. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute-maximum-rated conditions is not implied. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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