전자부품 데이터시트 검색엔진 |
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DAC667 데이터시트(PDF) 6 Page - Burr-Brown (TI) |
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DAC667 데이터시트(HTML) 6 Page - Burr-Brown (TI) |
6 / 9 page ® DAC667 6 high speed performance. It is recommended that both power ground (pin 16) and analog ground (AGND, pin 5) be connected directly to a ground plane under the package. If a ground plane is not used, connect the AGND and power ground pins together close to the package. Since the refer- ence point for V OUT and VREF OUT is the AGND pin, it is also important to connect the load directly to the AGND pin. The change in current in the AGND pin due to an input data word change from 000HEX to FFFHEX is only 1mA. OUTPUT VOLTAGE SWING AND RANGE CONNECTIONS The DAC667 output amplifier can provide ±10V output swing while operating on ±11.4V supplies. The Analog Devices AD667 requires a minimum of ±12.5V to achieve an output swing of ±10V. Internal scaling resistors provided in the DAC667 may be connected to produce bipolar output voltage ranges of ±10V, ±5V or ±2.5V or unipolar output voltage ranges of 0 to +5V or 0 to +10V. Refer to Figures 6, 7 and 8. Connections for various output ranges are shown in Table III. The internal feedback resistors (5k Ω) and the bipolar offset resistor (9.95k Ω) are trimmed to an absolute tolerance of about ±10%. full scale (–10V) for an output transition from +10V to –10V. Figure 4d shows the major carry glitch response for input code transitions 7FFHEX to 800HEX and for 800HEX to 7FF HEX. Unlike the Analog Devices AD667, the Burr-Brown DAC667 does not require an external capacitor (Cf = 20pF) across RSPAN to eliminate overshoot. Using the 20pF with the Burr- Brown DAC667 increases the settling time about one micro- second. The DAC667 settling time is specified at 7 µs maxi- mum. The AD667 is specified at 4 µs maximum. INSTALLATION POWER SUPPLY CONNECTIONS Note that the metal lid of the ceramic-packaged DAC667 is connected to –VEE. Take care to avoid accidental short circuits in tightly spaced installations. Power supply decoupling capacitors should be added as shown in Figure 5. Best settling performance occurs using a 1 µF to 10µF tantalum capacitor at –V EE. Applications with less critical settling time may be able to use 0.01 µF at –V EE as well as at +V CC. The capacitors should be located close to the DAC667 package. DAC667 features separate digital and analog power supply returns to permit optimum connections for low noise and (a) ± FULL SCALE OUTPUT SWING 2µs/Division Data = 000 HEX Data = FFF HEX Data HEX = 000 20 15 10 5 0 –5 –10 –15 –20 5 0 C f = 0 CS V OUT (b) PLUS FULL SCALE SETTLING, –10V TO +10V 1µs/Division 4 2 0 C f = 0 (d) MAJOR CARRY GLITCH 2µs/Division 250 200 150 100 50 0 +10 0 Data = 7FF H Data = 800 H Data = 7FF H (c) MINUS FULL SCALE SETTLING, +10V TO –10V 1µs/Division 4 2 0 V OUT CS C f = 0 FIGURE 4. Settling Time Performance, Z LOAD = 2k Ω || 500pF. |
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