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STC62WV25616EI 데이터시트(PDF) 2 Page - List of Unclassifed Manufacturers

부품명 STC62WV25616EI
상세설명  Very Low Power/Voltage CMOS SRAM 256K X 16 bit
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제조업체  ETC1 [List of Unclassifed Manufacturers]
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STC62WV25616EI 데이터시트(HTML) 2 Page - List of Unclassifed Manufacturers

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Revision 2.1
Jan.
2004
2
R0201-
STC62WV25616
Name
Function
A0-A17 Address Input
These 18 address inputs select one of the 262,144 x 16-bit words in the RAM.
CE Chip Enable Input
CE is active LOW. Chip enables must be active when data read from or write to the
device. if chip enable is not active, the device is deselected and is in a standby power
mode. The DQ pins will be in the high impedance state when the device is deselected.
WE Write Enable Input
The write enable input is active LOW and controls read and write operations. With the
chip selected, when WE is HIGH and OE is LOW, output data will be present on the
DQ pins; when WE is LOW, the data present on the DQ pins will be written into the
selected memory location.
OE Output Enable Input
The output enable input is active LOW. If the output enable is active while the chip is
selected and the write enable is inactive, data will be present on the DQ pins and they
will be enabled. The DQ pins will be in the high impedance state when OE is inactive.
LB and UB Data Byte Control Input
Lower byte and upper byte data input/output control pins.
DQ0 - DQ15 Data Input/Output
Ports
These 16 bi-directional ports are used to read data from or write data into the RAM.
Vcc
Power Supply
Gnd
Ground
TRUTH TABLE
PIN DESCRIPTIONS
STC
STC62WV25616
MODE
CE
WE
OE
LB
UB
D0~D7
D8~D15
Vcc CURRENT
H
X
X
X
X
High Z
High Z
ICCSB , ICCSB1
Not selected
(Power Down)
X
X
X
H
H
High Z
High Z
ICCSB , ICCSB1
Output Disabled
L
H
H
X
X
High Z
High Z
ICC
L
L
Dout
Dout
ICC
H
L
High Z
Dout
ICC
Read
L
H
L
L
H
Dout
High Z
ICC
LL
Din
Din
ICC
HL
X
Din
ICC
Write
L
L
X
LH
Din
X
ICC
L
XX
H
H
High Z
High Z
ICC


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