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74AUP2G04 데이터시트(PDF) 11 Page - NXP Semiconductors |
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74AUP2G04 데이터시트(HTML) 11 Page - NXP Semiconductors |
11 / 18 page 74AUP2G04_1 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Preliminary data sheet Rev. 01.00 — 16 January 2006 11 of 18 Philips Semiconductors 74AUP2G04 Low-power dual inverter 13. Waveforms CL = 15 pF tPHL, tPLH HIGH-to-LOW and LOW-to-HIGH propagation delay nA to nY see Figure 7 VCC = 1.1 V to 1.3 V 3.0 15.8 3.0 17.4 ns VCC = 1.4 V to 1.6 V 2.4 10.0 2.4 11.0 ns VCC = 1.65 V to 1.95 V 2.1 8.0 2.1 8.8 ns VCC = 2.3 V to 2.7 V 1.8 6.1 1.8 6.8 ns VCC = 3.0 V to 3.6 V 1.8 5.0 1.8 5.5 ns CL = 30 pF tPHL, tPLH HIGH-to-LOW and LOW-to-HIGH propagation delay nA to nY see Figure 7 VCC = 1.1 V to 1.3 V 4.0 19.0 4.0 20.9 ns VCC = 1.4 V to 1.6 V 3.2 12.9 3.2 14.2 ns VCC = 1.65 V to 1.95 V 2.9 10.5 2.9 11.6 ns VCC = 2.3 V to 2.7 V 2.6 7.6 2.6 8.4 ns VCC = 3.0 V to 3.6 V 2.6 6.2 2.6 6.9 ns Table 10: Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8 Symbol Parameter Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Max Min Max Measurement points are given in Table 11. Logic levels: VOL and VOH are typical output voltage drop that occur with the output load. Fig 7. The data input (nA) to output (nY) propagation delays Table 11: Measurement points Supply voltage Output Input VCC VM VM VI tr = tf 0.8 V to 3.6 V 0.5 × VCC 0.5 × VCC VCC ≤ 3.0 ns mna344 tPHL tPLH VM VM VM VM nA input nY output GND VI VOH VOL |
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