GS842Z18/36AB-180/166/150/100

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Rev: 1.03 11/2004

4/30

© 2001, GSI Technology

GS842Z18/36A Pin Description

Symbol

Type

Description

I

Address field LSBs and Address Counter Preset Inputs

An

I

Address Inputs

I/O

Data Input and Output pins

I

CK

I

Clock Input Signal; active high

CKE

I

Clock Input Buffer Enable; active low

W

I

Write Enable. Writes all enabled bytes; active low

I

Chip Enable; active low

I

Chip Enable; active high

G

I

Output Enable; active low

ADV

I

Burst address counter advance enable; active high

ZZ

I

Sleep Mode control; active high

FT

I

Flow Through or Pipeline mode; active low

LBO

I

Linear Burst Order mode; active low

ZQ

I

FLXDrive Output Impedance Control

(Low = Low Impedance [High Drive], High = High Impedance [Low Drive])

NC

—

No Connect

TMS

I

Scan Test Mode Select

TDI

I

Scan Test Data In

TDO

O

Scan Test Data Out

TCK

I

Scan Test Clock

I

Core power supply

I

I/O and Core Ground

I

Output driver power supply

CK

I

Clock Input Signal; active high