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GS8162Z36B-225 데이터시트(PDF) 8 Page - GSI Technology |
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GS8162Z36B-225 데이터시트(HTML) 8 Page - GSI Technology |
8 / 38 page GS8162Z18(B/D)/GS8162Z36(B/D)/GS8162Z72(C) Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Rev: 2.21 11/2004 8/38 © 1999, GSI Technology BPR1999.05.18 GS8162Z18/36 119-Bump and 165-Bump BGA Pin Description Symbol Type Description A0, A1 I Address field LSBs and Address Counter Preset Inputs An I Address Inputs DQA DQB DQC DQD I/O Data Input and Output pins BA, BB, BC, BD I Byte Write Enable for DQA, DQB, DQC, DQD I/Os; active low NC — No Connect CK I Clock Input Signal; active high CKE I Clock Enable; active low PE I Parity Bit Enable; active low (High = x16/32 Mode, Low = x18/36 Mode) W I Write Enable; active low E1 I Chip Enable; active low E3 I Chip Enable; active low E2 I Chip Enable; active high G I Output Enable; active low ADV I Burst address counter advance enable; active high ZZ I Sleep mode control; active high FT I Flow Through or Pipeline mode; active low LBO I Linear Burst Order mode; active low ZQ I FLXDrive Output Impedance Control (Low = Low Impedance [High Drive], High = High Impedance [Low Drive]) TMS I Scan Test Mode Select TDI I Scan Test Data In TDO O Scan Test Data Out TCK I Scan Test Clock VDD I Core power supply VSS I I/O and Core Ground VDDQ I Output driver power supply |
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