Rev: 1.01 7/2001

11/23

© 2000, Giga Semiconductor, Inc.

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS81032AT/Q-150/138/133/117/100/66

Notes:

1. Include scope and jig capacitance.

2. Test conditions as specified with output loading as shown in Fig. 1 unless otherwise noted.

4. Device is deselected as defined by the Truth Table.

AC Test Conditions

Parameter

Conditions

Input high level

2.3 V

Input low level

0.2 V

Input slew rate

1 V/ns

Input reference level

1.25 V

Output reference level

1.25 V

Output load

Fig. 1& 2

DC Electrical Characteristics

Parameter

Symbol

Test Conditions

Min

Max

Input Leakage Current

(except mode pins)

–1 uA

1 uA

ZZ Input Current

0 V

≤ V

IH

–1 uA

–1 uA

1 uA

300 uA

Mode Pin Input Current

0 V

≤ V

IL

–300 uA

–1 uA

1 uA

1 uA

Output Leakage Current

Output Disable,

–1 uA

1 uA

Output High Voltage

1.7V

—

Output High Voltage

2.4 V

—

Output Low Voltage

—

0.4 V

DQ

VT = 1.25 V

50

Ω

DQ

2.5 V

Output Load 1

Output Load 2

225

Ω

225

Ω

* Distributed Test Jig Capacitance