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GS832032T-200IV 데이터시트(PDF) 10 Page - GSI Technology

부품명 GS832032T-200IV
상세설명  2M x 18, 1M x 32, 1M x 36 36Mb Sync Burst SRAMs
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제조업체  GSI [GSI Technology]
홈페이지  http://www.gsitechnology.com
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GS832032T-200IV 데이터시트(HTML) 10 Page - GSI Technology

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First Write
First Read
Burst Write
Burst Read
Deselect
R
W
CR
CW
X
X
WR
R
WR
X
X
X
CR
R
CW
CR
CR
Notes:
1. The diagram shows only supported (tested) synchronous state transitions. The diagram presumes G is tied low.
2. The upper portion of the diagram assumes active use of only the Enable (E1, E2, and E3) and Write (BA, BB, BC, BD, BW, and GW)
control inputs, and that ADSP is tied high and ADSC is tied low.
3. The upper and lower portions of the diagram together assume active use of only the Enable, Write, and ADSC control inputs, and
assumes ADSP is tied high and ADV is tied low.
GS832018/32/36T-xxxV
Preliminary
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.03 6/2006
10/24
© 2003, GSI Technology
Simplified State Diagram


유사한 부품 번호 - GS832032T-200IV

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유사한 설명 - GS832032T-200IV

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