전자부품 데이터시트 검색엔진 |
|
74ABT834D 데이터시트(PDF) 1 Page - NXP Semiconductors |
|
74ABT834D 데이터시트(HTML) 1 Page - NXP Semiconductors |
1 / 7 page Philips Semiconductors Advanced BiCMOS Products Objective specification 74ABT834 Octal inverting transceiver with parity generator/checker (3–State) 1 June 9, 1992 FEATURES • Low static and dynamic power dissipation with high speed and high output drive • Open–collector ERROR output • Output capability: +64mA/–32mA • Latch–up protection exceeds 500mA per Jedec JC40.2 Std 17 • ESD protection exceeds 2000 V per MIL STD 883C Method 3015.6 and 200 V per Machine Model • Power up/down 3–State DESCRIPTION The 74ABT834 high–performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT834 is an octal inverting transceiver with a parity generator/checker and is intended for bus–oriented applications. When Output Enable A (OEA) is High, it will place the A outputs in a high impedance state. Output Enable B (OEB) controls the B outputs in the same way. The parity generator creates an odd parity output (PARITY) when OEB is Low. When OEA is Low, the parity of the B port, including the PARITY input, is checked for odd parity. When an error is detected, the error data is sent to the input of a storage register. If a Low–to–High transition happens at the clock input (CP), the error data is stored in the register and the Open–collector error flag (ERROR) will go Low. The error flag register is cleared with a Low pulse on the CLEAR input. If both OEA and OEB are Low, data will flow from the A bus to the B bus and the part is forced into an error condition which creates an inverted PARITY output. This error condition can be used by the designer for system diagnostics. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS Tamb = 25°C; GND = 0V TYPICAL UNIT tPLH tPHL Propagation delay An to Bn or Bn to An CL = 50pF; VCC = 5V 3.4 ns tPLH tPHL Propagation delay An to PARITY CL = 50pF; VCC = 5V 7.4 ns CIN Input capacitance VI = 0V or VCC 4 pF COUT Output capacitance VI = 0V or VCC 7 pF ICCZ Total supply current Outputs disabled; VCC =5.5V 50 µA ORDERING INFORMATION PACKAGES CONDITIONS Tamb = 25°C; GND = 0V ORDER CODE 24–pin plastic DIP (300mil) –40 °C to +85°C 74ABT834N 24–pin plastic SOL (300mil) –40 °C to +85°C 74ABT834D PIN CONFIGURATION LOGIC SYMBOL 24 23 22 21 20 19 18 17 16 15 14 13 12 10 11 9 8 7 6 5 4 3 2 1 VCC GND CLEAR OEA B0 B1 B2 B3 B6 B7 PARITY OEB A0 A1 A2 A3 A4 A5 A6 A7 ERROR CP B4 B5 OEB OEA CLEAR 14 1 11 15 10 PARITY ERROR TOP VIEW CP 13 2 3 4 5 6 7 8 9 A0 A1 A2 A3 A4 A5 A6 A7 B0 B1 B2 B3 B4 B5 B6 B7 23 22 21 20 19 18 17 16 |
유사한 부품 번호 - 74ABT834D |
|
유사한 설명 - 74ABT834D |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |