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74AVC16373DGG 데이터시트(PDF) 11 Page - NXP Semiconductors |
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74AVC16373DGG 데이터시트(HTML) 11 Page - NXP Semiconductors |
11 / 16 page 2000 Mar 09 11 Philips Semiconductors Product Specification 16-bit D-type transparent latch; 3.6 V tolerant; 3-state 74AVC16373 handbook, full pagewidth MNA478 tPLZ tPHZ outputs disabled outputs enabled VY VX outputs enabled output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH nOE input VI VOL VOH VCC VM GND GND tPZL tPZH VM VM Fig.9 3-state enable and disable times. VCC VM VX VY VI ≤2.3 to 2.7 V 0.5 × VCC VOL + 0.15 V VOH − 0.15 V VCC 3.0 to 3.6 V 0.5 × VCC VOL + 0.3 V VOH − 0.3 V VCC VOL and VOH are typical output voltage drop that occur with the output load. handbook, full pagewidth MNA542 th tsu th tsu VM VM VI GND VI GND nLE input nDn input Fig.10 Data set-up and hold times for nDn input to nLE input. VCC VM VI ≤2.3 to 2.7 V 0.5 × VCC VCC 3.0 to 3.6 V 0.5 × VCC VCC The shaded areas indicate when the input is permitted to change for predictable output performance. |
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