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M29W160DT 데이터시트(PDF) 5 Page - STMicroelectronics

부품명 M29W160DT
상세설명  16 Mbit (2Mb x8 or 1Mb x16, Boot Block) 3V Supply Flash Memory
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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M29W160DT 데이터시트(HTML) 5 Page - STMicroelectronics

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M29W160DT, M29W160DB
SUMMARY DESCRIPTION
The M29W160D is a 16 Mbit (2Mb x8 or 1Mb x16)
non-volatile memory that can be read, erased and
reprogrammed. These operations can be per-
formed using a single low voltage (2.7 to 3.6V)
supply. On power-up the memory defaults to its
Read mode where it can be read in the same way
as a ROM or EPROM.
The memory is divided into blocks that can be
erased independently so it is possible to preserve
valid data while old data is erased. Each block can
be protected independently to prevent accidental
Program or Erase commands from modifying the
memory. Program and Erase commands are writ-
ten to the Command Interface of the memory. An
on-chip Program/Erase Controller simplifies the
process of programming or erasing the memory by
taking care of all of the special operations that are
required to update the memory contents.
The end of a program or erase operation can be
detected and any error conditions identified. The
command set required to control the memory is
consistent with JEDEC standards.
The blocks in the memory are asymmetrically ar-
ranged, see Tables 2 and 3, Block Addresses. The
first or last 64 Kbytes have been divided into four
additional blocks. The 16 Kbyte Boot Block can be
used for small initialization code to start the micro-
processor, the two 8 Kbyte Parameter Blocks can
be used for parameter storage and the remaining
32K is a small Main Block where the application
may be stored.
Chip Enable, Output Enable and Write Enable sig-
nals control the bus operation of the memory.
They allow simple connection to most micropro-
cessors, often without additional logic.
The memory is offered in TSOP48 (12 x 20mm),
SO44 and LFBGA48 (0.8mm pitch) packages and
it is supplied with all the bits erased (set to ’1’).
Figure 2. Logic Diagram
Note: RB not available on SO44 package.
Table 1. Signal Names
AI03843
20
A0-A19
W
DQ0-DQ14
VCC
M29W160DT
M29W160DB
E
VSS
15
G
RP
DQ15A–1
BYTE
RB
A0-A19
Address Inputs
DQ0-DQ7
Data Inputs/Outputs
DQ8-DQ14
Data Inputs/Outputs
DQ15A–1
Data Input/Output or Address Input
E
Chip Enable
G
Output Enable
W
Write Enable
RP
Reset/Block Temporary Unprotect
RB
Ready/Busy Output
(Not available on SO44 package)
BYTE
Byte/Word Organization Select
VCC
Supply Voltage
VSS
Ground
NC
Not Connected Internally
DU
Don’t Use as internally connected


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