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MC14529B

 3.3 VOLT ONLY DRIVER / RECEIVER WITH AN INTEGRATED STANDBY MODE ( 8 Page)


MOTOROLA
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MOTOROLA CMOS LOGIC DATA
MC14529B
2
ELECTRICAL CHARACTERISTICS
Characteristic
Symbol
VDD
Test Conditions
– 55
_C
25
_C
125
_C
Unit
Characteristic
Symbol
VDD
Test Conditions
Min
Max
Min
Typ #
Max
Min
Max
Unit
SUPPLY REQUIREMENTS (Voltages Referenced to VEE)
Power Supply Voltage
Range
VDD
VDD – 3.0 ≥ VSS ≥
VEE
3.0
18
3.0
18
3.0
18
V
Quiescent Current Per
Package
IDD
5.0
10
15
Control Inputs: Vin =
VSS or VDD,
Switch I/O: VSS v
VI/O v VDD, and
∆Vswitch v 500 mV**
1.0
1.0
2.0
0.005
0.010
0.015
1.0
1.0
2.0
60
60
120
µA
Total Supply Current
(Dynamic Plus
Quiescent, Per Package
ID(AV)
5.0
10
15
TA = 25_C only (The
channel component,
(Vin – Vout) / Ron, is
not included.)
(0.07
µA/kHz) f + IDD
Typical
(0.20
µA/kHz) f + IDD
(0.36
µA/kHz) f + IDD
µA
CONTROL INPUTS — INHIBIT, A, B (Voltages Referenced to VSS)
Low–Level Input Voltage
VIL
5.0
10
15
Ron = per spec,
Ioff = per spec
1.5
3.0
4.0
2.25
4.50
6.75
1.5
3.0
4.0
1.5
3.0
4.0
V
High–Level Input Voltage
VIH
5.0
10
15
Ron = per spec,
Ioff = per spec
3.5
7.0
11
3.5
7.0
11
2.75
5.50
8.25
3.5
7.0
11
V
Input Leakage Current
Iin
15
Vin = 0 or VDD
± 0.1
±0.00001 ±0.1
±1.0
µA
Input Capacitance
Cin
5.0
7.5
pF
SWITCHES IN/OUT AND COMMONS OUT/IN — W, Z (Voltages Referenced to VEE)
Recommended Peak–to–
Peak Voltage Into or
Out of the Switch
VI/O
Channel On or Off
0
VDD
0
VDD
0
VDD
Vp–p
Recommended Static or
Dynamic Voltage
Across the Switch**
(Figure 5)
∆Vswitch
Channel On
0
600
0
600
0
300
mV
Output Offset Voltage
VOO
Vin = 0 V, No Load
10
µV
ON Resistance
Ron
10
15
∆Vswitch v 500 mV**,
Vin = VIL or VIH
(Control), and Vin =
0 to VDD (Switch)
400
240
120
80
480
270
560
350
∆ON Resistance Between
Any Two Channels
in the Same Package
∆Ron
10
15
15
10
Off–Channel Leakage
Current (Figure 10)
Ioff
15
Vin = VIL or VIH
(Control) Channel to
Channel or Any One
Channel
± 100
± 0.05
± 100
±1000
nA
Capacitance, Switch I/O
CI/O
Inhibit = VDD
8.0
pF
Capacitance, Common O/I
CO/I
Inhibit = VDD
20
pF
Capacitance, Feedthrough
(Channel Off)
CI/O
Pins Not Adjacent
Pins Adjacent
0.15
0.47
pF
#Data labelled “Typ” is not to be used for design purposes, but is intended as an indication of the IC’s potential performance.
** For voltage drops across the switch (
∆Vswitch) > 600 mV ( > 300 mV at high temperature), excessive VDD current may be drawn; i.e. the
current out of the switch may contain both VDD and switch input components. The reliability of the device will be unaffected unless the Maximum
Ratings are exceeded. (See first page of this data sheet.)
1  2  3  4  5  6  7  8 



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