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SM5819HQF 데이터시트(PDF) 7 Page - Nippon Precision Circuits Inc |
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SM5819HQF 데이터시트(HTML) 7 Page - Nippon Precision Circuits Inc |
7 / 18 page SM5819HQF NIPPON PRECISION CIRCUITS INC.—7 DSD input I DSBCK pin I DSIFL, DSIFR, DSISL, DSISR, DSICT, DSISW pins Note. DSD clock pulsewidth and DSD clock pulse cycle when DSBCK is in input mode. Note. The data, with DSBCK timing above, enters the internal circuits on the falling edge of the MCK clock. Consequently, if the timing changes, the circuit must be resynchronized using INIT or SYNC. Parameter Symbol Rating Unit min typ max DSD clock pulsewidth tDSCW 150 177.16 – ns DSD clock pulse cycle tDSCY 300 354.31 (1/64fs) – ns DSD data setup time tDSS 50 – – ns DSD data hold time tDSH 50 – – ns DSI**: DSIFL, DSIFR, DSISL, DSISR, DSICT, DSISW pins DSBCK tDSCW tDSCW tDSCY tDSS tDSH DSI** |
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