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AD8342ACPZ-WP 데이터시트(PDF) 3 Page - Analog Devices

부품명 AD8342ACPZ-WP
상세설명  Active Receive Mixer LF to 500 MHz
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
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AD8342
Rev. 0 | Page 3 of 20
SPECIFICATIONS
VS = 5 V, TA = 25°C, fRF = 238 MHz, fLO = 286 MHz, LO power = 0 dBm, ZO = 50 Ω, RBIAS = 1.82 kΩ, RF termination = 100 Ω, IF termi-
nated into 100 Ω through a 2:1 ratio balun, unless otherwise noted.
Table 1.
Parameter
Conditions
Min
Typ
Max
Unit
RF INPUT INTERFACE
Return Loss
Hi-Z input terminated with 100 Ω off-chip resistor
10
dB
Input Impedance
Frequency = 238 MHz (measured at RFIN with RFCM ac-
grounded)
1||0.4
kΩ||pF
DC Bias Level
Internally generated; port must be ac-coupled
2.4
V
OUTPUT INTERFACE
Output Impedance
Differential impedance, frequency = 48 MHz
10||0.5
kΩ||pF
DC Bias Voltage
Supplied externally
4.75
VS
5.25
V
Power Range
Via a 2:1 impedance ratio transformer
13
dBm
LO INTERFACE
Return Loss
10
dB
DC Bias Voltage
Internally generated; port must be ac-coupled
VS − 1.6
V
POWER-DOWN INTERFACE
PWDN Threshold
3.5
V
PWDN Response Time
Device enabled, IF output to 90% of its final level
0.4
µs
Device disabled, supply current <5 mA
4
µs
PWDN Input Bias Current
Device enabled
−80
µA
Device disabled
+100
µA
POWER SUPPLY
Positive Supply Voltage
4.75
5
5.25
V
Quiescent Current
VPDC
Supply current for bias cells
5
mA
VPMX, IFOP, IFOM
Supply current for mixer, RBIAS = 1.82 kΩ
58
mA
VPLO
Supply current for LO limiting amplifier
35
mA
Total Quiescent Current
VS = 5 V
85
98
113
mA
Power-Down Current
Device disabled
500
µA


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