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74V2T07 데이터시트(PDF) 1 Page - STMicroelectronics |
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74V2T07 데이터시트(HTML) 1 Page - STMicroelectronics |
1 / 7 page 1/7 June 2003 s HIGH SPEED: tPD = 4.3ns (TYP.) at VCC =5V s LOW POWER DISSIPATION: ICC =1µA(MAX.) at TA =25°C s COMPATIBLE WITH TTL OUTPUTS: VIH =2V (MIN), VIL =0.8V (MAX) s POWER DOWN PROTECTION ON INPUT s OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V s IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74V2T07 is an advanced high-speed CMOS TRIPLE BUFFER (OPEN DRAIN) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 2 stages including buffer output, which provide high noise immunity and stable output. Power down protection is provided on input and 0 to 7V can be accepted on input with no regard to the supply voltage. This device can be used to interface5V to3V. 74V2T07 TRIPLE BUFFER (OPEN DRAIN) PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE T & R SOT23-8L 74V2T07STR SOT23-8L |
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