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AM29LV641ML120EI 데이터시트(PDF) 58 Page - SPANSION

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상세설명  64 Megabit (4 M x 16-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O Control
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Am29LV641MH/L
December 21, 2005
DA TA SH EET
REVISION SUMMARY
Revision A (August 3, 2001)
Initial release as abbreviated Advance Information
data sheet.
Revision A+1 (October 3, 2001)
Global
Added 120 ns speed option.
Ordering Information
Changed operating voltage range for 90 ns device.
Physical Dimensions
Added section.
Revision B (March 14, 2002)
Global
Expanded data sheet to full specification version.
Revision B+1 (April 26, 2002)
MirrorBit 64 Mbit Device Family
Deleted Am29LV641MT/B.
Figure 2, In-System Sector Group
Protect/Unprotect Algorithms
Added A3 and A2 address requirement.
Sector Group Protection/Unprotection
Deleted reference to alternate method of sector pro-
tection.
Autoselect Command
Substituted text with ID code table for easier refer-
ence.
Table 10, Command Definitions
Combined Notes 4 and 5 from Revision B. Corrected
number of cycles indicated for Write-to-Buffer and Au-
toselect Device ID command sequences.
Figure 25, Sector Group Protect and Unprotect
Timing Diagram
In the note, added A3 and A2 address requirement.
Revision B+2 (August 1, 2002)
Mirrorbit 64 MBIT Device Family
Added 64 Fortified BGA to table.
Program Suspend/Program Resume Command
Sequence
Changed program operation wait time from 1ms to
15
μs.
Figure 5. Program Suspend/Program Resume
Changed wait from 1ms to 15
μs.
Erase Resume/Erase Resume Commands
Added a maximum of 20
μs.
Alternate CE# Controlled Erase and Program
Operations
Added T
RH parameter to table.
Special package handling instructions
Modified the special handling wording.
DC Characteristics table
Deleted the I
ACC specification row.
CFI
Changed text in the third paragraph of CFI to read
“reading array data.”
Revision B+3 (September 10, 2002)
Product Selector Guide
Added Note 2.
Ordering Information
Added Note 1.
Sector Erase Command Sequence
Deleted statement that describes the outcome of
when the Embedded Erase operation is in progress.
Revision B+4 (October 15, 2002)
Erase and Programming Performance
Changed values for typical and maximum times on
word program time and write buffer program time to
TBD. Inserted TBD for maximum chip erase time.
Revision B+5 (November 26, 2002)
Product Selector Guide and Read-Only
Characteristics
Added a 30 ns option to t
PACC and tOE standard for the
112R and 120R speed options.
Customer Lockable: SecSi Sector NOT
Programmed or Protected at the factory.
Added second bullet, SecSi sector-protect verify text
and figure 3.
SecSi Sector Flash Memory Region, and Enter
SecSi Sector/Exit SecSi Sector Command
Sequence
Noted that the ACC function and unlock bypass modes
are not available when the SecSi sector is enabled.


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