IC62LV12816DL datasheet(6/12 Pages) ICSI | 128 K x 16 bit Low Voltage and Ultra Low Power CMOS Static RAM

6 page

Integrated Circuit Solution Inc.

LPSR025-0A 6/7/2002

IC62LV12816DL

IC62LV12816DLL

READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)

-55

-70

-100

Symbol Parameter

Min.

Max.

Min.

Max.

Min.

Max.

Unit

tRC

Read Cycle Time

—

100

—

tAA

Address Access Time

—

100

tOHA

Output Hold Time

—

tACE

CE Access Time

—

100

tDOE

OE Access Time

—

tHZOE(2) OE to High-Z Output

—

tLZOE(2)

OE to Low-Z Output

—

tHZCE(2) CE to High-Z Output

tLZCE(2)

CE to Low-Z Output

—

tBA

LB, UB Access Time

—

100

tHZB

LB, UB o High-Z Output

tLZB

LB. UB to Low-Z Output

—

Notes:

1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels

of 0.4V to 2.2V and output loading specified in Figure 1.

2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

IC62LV12816DLL POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)

-55

-70

-100

Symbol Parameter

Test Conditions

Min. Max.

Unit

ICC

Vcc Dynamic Operating

VCC = Max

Com.

—

Supply Current

IOUT = 0 mA, f = fMAX

Ind.

—

ISB1

TTL Standby Current

VCC = Max.,

Com.

—

0.5

—

0.5

—

0.5

(TTL Inputs)

VIN = VIH or VIL,

Ind.

—

1.0

—

1.0

—

1.0

CE1 = VIH, CE2 = VIL

ISB2

CMOS Standby

VCC = Max., f = 0

Com.

—

µA

Current (CMOS Inputs)

CE1

≥ VCC – 0.2V,

Ind.

—

or CE2

≤ 0.2V

other input = 0-VCC, f = 0

ULB Control

VCC = Max., CE1 = VIL, CE2 = VIH

VIN

≤ 0.2V, f = 0, UB / LB = VCC – 0.2V

Note:

1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.

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