ADG787 datasheet(6/16 Pages) AD

부품명	ADG787

상세설명	2.5 OHM CMOS Low Power Dual 2:1 Mux/Demux USB 1.1 Switch

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ADG787

Rev. A | Page 6 of 16

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

ADG787

TOP VIEW

(Not to Scale)

VDD 1

S1A 2

D1

3

IN1

4

S1B

5

S2A

D2

IN2

S2B

GND

10

9

8

7

6

Figure 3. 10-Lead LFCSP and 10-lead MSOP Pin Configuration

S2B

GND

S1B

abc

IN2

IN1

D2

D1

S2A

1

2

3

4

VDD

S1A

TOP VIEW

(BALLS AT THE BOTTOM)

Figure 4. 10-Ball WLCSP Pin Configuration

Table 4. 10-Lead LFCSP/MSOP Pin Function Descriptions

No.

Mnemonic

Description

1

VDD

Most Positive Power Supply Potential.

2

S1A

Source Terminal. May be an input or

output.

3

D1

Drain Terminal. May be an input or

output.

4

IN1

Logic Control Input.

5

S1B

Source Terminal. May be an input or

output.

6

GND

Ground (0 V) Reference.

7

S2B

Source Terminal. May be an input or

output.

8

IN2

Logic Control Input.

9

D2

Drain Terminal. May be an input or

output.

10

S2A

Source Terminal. May be an input or

output.

Table 5. 10-Lead WLCSP Pin Function Descriptions

Ball

Location

Mnemonic

Description

1a

S1B

Source Terminal. May be an input or

output.

1b

GND

Ground (0 V) Reference.

1c

S2B

Source Terminal. May be an input or

output.

2a

IN1

Source Terminal. May be an input or

output.

2c

IN2

Logic Control Input.

3a

D1

Drain Terminal. May be an input or

output.

3c

D2

Drain Terminal. May be an input or

output.

4a

S1A

Logic Control Input.

4b

VDD

Most Positive Power Supply Potential.

4c

S2A

Source Terminal. May be an input or

output.

TRUTH TABLE

Table 6.

Logic (IN1/IN2)

Switch 1A/2A

Switch 1B/2B

0

Off

On

1

On

Off

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