2SC5658M3T5G

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4

PACKAGE DIMENSIONS

SOT−723

CASE 631AA−01

ISSUE A

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

1.0

0.039

mm

inches

SCALE 20:1

0.40

0.0157

0.40

0.0157

0.40

0.0157

0.40

0.0157

0.40

0.0157

D

b1

E

b

e

A

L

C

H

−Y−

−X−

X

0.08 (0.0032)

Y

2X

E

1

2

3

DIM

MIN

NOM

MAX

MILLIMETERS

A

0.45

0.50

0.55

b

0.15

0.20

0.27

b1

0.25

0.3

0.35

C

0.07

0.12

0.17

D

1.15

1.20

1.25

E

0.75

0.80

0.85

e

0.40 BSC

H

1.15

1.20

1.25

L

0.15

0.20

0.25

0.018

0.020

0.022

0.0059 0.0079 0.0106

0.010

0.012

0.014

0.0028 0.0047 0.0067

0.045

0.047

0.049

0.03

0.032

0.034

0.016 BSC

0.045

0.047

0.049

0.0059 0.0079 0.0098

MIN

NOM

MAX

INCHES

E

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. MAXIMUM LEAD THICKNESS INCLUDES LEAD

FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM

THICKNESS OF BASE MATERIAL.

4. DIMENSIONS D AND E DO NOT INCLUDE MOLD

FLASH, PROTRUSIONS OR GATE BURRS.

SOT−723

ON Semiconductor and

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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability

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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All

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