ADM1041A datasheet(6/56 Pages) AD | Secondary-Side Controller with Current Share and Housekeeping

6 page

ADM1041A

Rev. 0 | Page 6 of 56

SPECIFICATIONS

TA = –40 to +85°C, VDD = 5 V ± 10%, unless otherwise noted.

Table 1.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

SUPPLIES

VDD

4.5

5.0

5.5

IDD, Current Consumption

Peak IDD, during EEPROM Erase Cycle1, 2

UNDERVOLTAGE LOCKOUT, VDD

See Figure 9.

Start-Up Threshold

4.3

4.5

Stop Threshold

3.7

4.2

Hysteresis

0.3

POWER BLOCK PROTECTION

VDD Overvoltage

5.8

6.2

6.5

VDD Overvoltage Debounce

300

500

700

μs

Latching

Open Ground

0.1

0.2

0.35

VGND positive with respect to VS−

VDDOK Debounce

250

400

500

μs

VDDOK

POWER-ON RESET

DC Level

1.5

2.2

2.75

VDD rising

DIFFERENTIAL LOAD VOLTAGE SENSE INPUT,

(VS−, VS+)

See Figure 6. VNOM = (VS+ – VS−); VNOM

is typically 2 V

VS− Input Voltage

0.5

Voltage on Pin 20

VS+ Input Voltage

VDD – 2

Voltage on Pin 21

VS− Input Resistance

kΩ

VS+ Input Resistance

500

kΩ

VNOM Adjustment Range

1.7 to 2.3

Set Load Voltage Trim Step

0.10 to 0.14

1.7 V ≤ VNOM ≤ 2.3 V typ

1.74 to 3.18

8 bits, 255 steps

Reg 19h[7:0]. See Table 34

Set Load Overvoltage Trim Range

105 to 120

1.7 V ≤ VNOM ≤ 2.3 V min

Set Load Overvoltage Trim Step

0.09

8 bits, 255 step/s

1.6

Reg 08h[7:0]. See Table 17.

VS+ = 2.24 V

Recover from Load OV False to FG True

100

μs

Reg 03h[1:0] = 00. See Table 12.

200

μs

Reg 03h[1:0] = 01. See Table 12.

300

μs

Reg 03h[1:0] = 10. See Table 12.

400

μs

Reg 03h[1:0] = 11. See Table 12.

Operate Time from Load OV to FG False

μs

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