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ADP1710 데이터시트(Datasheet) 5 Page - Analog Devices

부품명 ADP1710
상세내용  150 mA, Low Dropout, CMOS Linear Regulator
PDF  16 Pages
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ADP1710/ADP1711
Rev. 0 | Page 5 of 16
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
IN
GND
EN
OUT
NC
1
2
3
5
4
NC = NO CONNECT
ADP1710
FIXED
TOP VIEW
(Not to Scale)
IN
GND
EN
OUT
ADJ
1
2
3
5
4
ADP1710
ADJUSTABLE
TOP VIEW
(Not to Scale)
IN
GND
EN
OUT
BYP
1
2
3
5
4
ADP1711
TOP VIEW
(Not to Scale)
Figure 4. 5-Lead TSOT (UJ-Suffix)
Figure 5. 5-Lead TSOT (UJ-Suffix)
Figure 6. 5-Lead TSOT (UJ-Suffix)
Table 4. Pin Function Descriptions
ADP1710
Fixed
Pin No.
ADP1710
Adjustable
Pin No.
ADP1711
Pin No.
Mnemonic
Description
1
1
1
IN
Regulator Input Supply. Bypass IN to GND with a 1 μF or greater capacitor.
2
2
2
GND
Ground.
3
3
3
EN
Enable Input. Drive EN high to turn on the regulator; drive it low to turn off the
regulator. For automatic startup, connect EN to IN.
4
NC
No Connect.
4
ADJ
Adjust. A resistor divider from OUT to ADJ sets the output voltage.
4
BYP
Connect a 1 nF or greater capacitor (10 nF is recommended) between BYP and GND
to reduce the internal reference noise for low noise applications.
5
5
5
OUT
Regulated Output Voltage. Bypass OUT to GND with a 1 μF or greater capacitor.




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