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74AUP2G00 데이터시트(PDF) 10 Page - NXP Semiconductors

부품명 74AUP2G00
상세설명  Low-power dual 2-input NAND gate
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제조업체  PHILIPS [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

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74AUP2G00_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 August 2006
10 of 16
Philips Semiconductors
74AUP2G00
Low-power dual 2-input NAND gate
[1]
For measuring enable and disable times RL =5kΩ, for measuring propagation delays, setup and hold times and pulse width RL =1MΩ.
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 8.
Load circuitry for switching times
001aac521
PULSE
GENERATOR
DUT
RT
VI
VO
VEXT
VCC
RL
5 k
CL
Table 10.
Test data
Supply voltage
Load
VEXT
VCC
CL
RL[1]
tPLH, tPHL
tPZH, tPHZ
tPZL, tPLZ
0.8 V to 3.6 V
5 pF, 10 pF, 15 pF and 30 pF 5 k
Ω or 1 MΩ
open
GND
2
× VCC


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