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74LVC1G332GM 데이터시트(PDF) 7 Page - NXP Semiconductors |
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74LVC1G332GM 데이터시트(HTML) 7 Page - NXP Semiconductors |
7 / 15 page 74LVC1G332_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 11 October 2006 7 of 15 NXP Semiconductors 74LVC1G332 Single 3-input OR gate [1] Typical values are measured at Tamb =25 °C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively. [2] tpd is the same as tPLH and tPHL. [3] CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑(CL × VCC2 × fo) = sum of outputs. 12. AC waveforms CPD power dissipation capacitance VI = GND to VCC; VCC = 3.3 V [3] -12- - - pF Table 8. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 8. Symbol Parameter Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ[1] Max Min Max Measurement points are given in Table 9. VOL and VOH are typical output voltage drops that occur with the output load. Fig 7. The input A, B and C to output Y propagation delays 001aad936 A, B, C input Y output tPLH tPHL GND VI VM VM VOH VOL Table 9. Measurement points Supply voltage Input Output VCC VM VM 1.65 V to 1.95 V 0.5 × VCC 0.5 × VCC 2.3 V to 2.7 V 0.5 × VCC 0.5 × VCC 2.7 V 1.5 V 1.5 V 3.0 V to 3.6 V 1.5 V 1.5 V 4.5 V to 5.5 V 0.5 × VCC 0.5 × VCC |
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