전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

SN74GTLPH1612DGGR 데이터시트(PDF) 10 Page - Texas Instruments

부품명 SN74GTLPH1612DGGR
상세설명  18-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE UNIVERSAL BUS TRANSCEIVER
Download  15 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI - Texas Instruments

SN74GTLPH1612DGGR 데이터시트(HTML) 10 Page - Texas Instruments

Back Button SN74GTLPH1612DGGR Datasheet HTML 6Page - Texas Instruments SN74GTLPH1612DGGR Datasheet HTML 7Page - Texas Instruments SN74GTLPH1612DGGR Datasheet HTML 8Page - Texas Instruments SN74GTLPH1612DGGR Datasheet HTML 9Page - Texas Instruments SN74GTLPH1612DGGR Datasheet HTML 10Page - Texas Instruments SN74GTLPH1612DGGR Datasheet HTML 11Page - Texas Instruments SN74GTLPH1612DGGR Datasheet HTML 12Page - Texas Instruments SN74GTLPH1612DGGR Datasheet HTML 13Page - Texas Instruments SN74GTLPH1612DGGR Datasheet HTML 14Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 10 / 15 page
background image
www.ti.com
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT FOR A OUTPUTS
S1
Open
GND
500
500
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
6 V
GND
tPLH
tPHL
Output
Control
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
3 V
0 V
VOH
VOL
0 V
VOL + 0.3 V
VOH − 0.3 V
≈0 V
3 V
0 V
tw
Input
3 V
3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
(VM = 1.5 V for A port and 1 V for B port)
(VOH = 3 V for A port and 1.5 V for B port)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
(A port to B port)
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
(A port)
Output
Input
1.5 V
Test
Point
CL = 30 pF
(see Note A)
From Output
Under Test
12.5
LOAD CIRCUIT FOR B OUTPUTS
0 V
VOH
VOL
Input
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
(B port to A port)
Output
1.5 V
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≈ 10 MHz, ZO = 50 Ω, tr ≈ 2 ns, tf ≈ 2 ns.
D. The outputs are measured one at a time, with one transition per measurement.
6 V
tPLH
tPHL
VOH
0 V
VM
VM
Data
Input
3 V
0 V
tsu
th
Timing
Input
1.5 V
1.5 V
1.5 V
1.5 V
1 V
1 V
1 V
1 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
SN74GTLPH1612
18-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE
UNIVERSAL BUS TRANSCEIVER
SCES287D – OCTOBER 1999 – REVISED MAY 2005
Figure 1. Load Circuits and Voltage Waveforms
10


유사한 부품 번호 - SN74GTLPH1612DGGR

제조업체부품명데이터시트상세설명
logo
Texas Instruments
SN74GTLPH1616 TI1-SN74GTLPH1616 Datasheet
351Kb / 18P
[Old version datasheet]   17-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE UNIVERSAL BUS TRANSCEIVER WITH BUFFERED CLOCK OUTPUTS
SN74GTLPH1616DGGR TI1-SN74GTLPH1616DGGR Datasheet
351Kb / 18P
[Old version datasheet]   17-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE UNIVERSAL BUS TRANSCEIVER WITH BUFFERED CLOCK OUTPUTS
More results

유사한 설명 - SN74GTLPH1612DGGR

제조업체부품명데이터시트상세설명
logo
Texas Instruments
SN74GTLPH1655 TI-SN74GTLPH1655 Datasheet
173Kb / 16P
[Old version datasheet]   16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE UNIVERSAL BUS TRANSCEIVER
SN74GTLPH1645 TI1-SN74GTLPH1645_15 Datasheet
1Mb / 22P
[Old version datasheet]   16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER
logo
Fairchild Semiconductor
GTLP18T612 FAIRCHILD-GTLP18T612 Datasheet
74Kb / 9P
   18-Bit LVTTL/GTLP Universal Bus Transceiver
logo
Texas Instruments
SN74GTLPH16912 TI-SN74GTLPH16912 Datasheet
218Kb / 14P
[Old version datasheet]   18-BIT LVTTL-TO-GTLP UNIVERSAL BUS TRANSCEIVER
SN74GTLPH16612 TI-SN74GTLPH16612 Datasheet
166Kb / 11P
[Old version datasheet]   18-BIT LVTTL-TO-GTLP UNIVERSAL BUS TRANSCEIVER
SN74GTLPH16912 TI-SN74GTLPH16912_07 Datasheet
324Kb / 18P
[Old version datasheet]   18-BIT LVTTL-TO-GTLP UNIVERSAL BUS TRANSCEIVER
SN74GTLPH3245 TI1-SN74GTLPH3245 Datasheet
435Kb / 19P
[Old version datasheet]   32-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER
SN74GTLPH1645 TI-SN74GTLPH1645 Datasheet
259Kb / 17P
[Old version datasheet]   16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER
SN74GTLPH1616 TI1-SN74GTLPH1616 Datasheet
351Kb / 18P
[Old version datasheet]   17-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE UNIVERSAL BUS TRANSCEIVER WITH BUFFERED CLOCK OUTPUTS
SN74GTLPH32912 TI1-SN74GTLPH32912 Datasheet
388Kb / 17P
[Old version datasheet]   36-BIT LVTTL-TO-GTLP UNIVERSAL BUS TRANSCEIVER
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15


데이터시트 다운로드

Go To PDF Page


링크 URL




개인정보취급방침
ALLDATASHEET.CO.KR
ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com