DS726RD1

3

CRD4525

1. SYSTEM OVERVIEW

The CRD4525 reference design is an excellent means for evaluating the CS4525 30 W digital TV amplifier with in-

tegrated ADC. Analog and digital audio input signal interfaces are provided, an on-board microcontroller and USB

PC interface is used for easily configuring the CS4525’s internal registers, and a USB cable is included for use with

the FlexGUI Windows configuration software.

The CRD4525 schematic set is shown in Figure 6 through Figure 9.

1.1

Power

A 80 W OEM switching-mode power supply is included to power the CRD4525. The power supply provides

+18 V to the CS4525 power stages, and an on-board buck-converter and regulator provide power to the

logic-level digital circuitry.

Power must be supplied from the included power supply to the CRD4525 via the power connector J3 (see

the System Connections table on page 13).

1.2

CS4525 Digital TV Amplifier

A complete description of the CS4525 is included in the CS4525 product data sheet.

The required configuration settings of the CS4525 are achieved via its control port registers, accessible

through the CS4525 tab of the Cirrus Logic FlexGUI software. A register-level configuration interface is pro-

vided on the Register Maps tab. See the “PC Software Control” section on page 6 for more information.

1.3

CS8416 Digital Audio Receiver

A complete description of the CS8416 receiver (Figure 8 on page 16) and a discussion of the digital audio

interface are included in the CS8416 data sheet.

The CS8416 converts the input S/PDIF data stream into PCM data and clocks for the CS4525. The CS8416

operates in master mode and can provide PCM data in Left-Justified, I²S, Right-Justified 16-bit, and Right-

Justified 24-bit interface formats.

The most common operations of the CS8416 may be controlled via the S/PDIF Input Controls tab in the GUI

software application. Advanced options are accessible through the CS8416 sub-tab on the Register Maps

tab of the Cirrus Logic FlexGUI software.

1.4

System Clocking

A 24.576 MHz parallel resonant crystal, Y1, is available to provide a clock source to the CS4525. The crystal

is mounted in pin sockets, allowing easy removal or replacement. Alternatively, an input SYS_CLK signal

can be provided on pin 3 of the serial audio input header (J2).

1.5

External Data Headers

The evaluation board has been designed to allow interfacing with external systems via the headers J2, J4,

and J11. Figure 6 shows the headers’ electrical connections.

The 12-pin, 3 column header, J2, provides access to the CS4525’s serial audio input and SYS_CLK input

signals. Place shunts across the SCLK, LRCK, and SDIN pins located in the columns labeled “S/PDIF” to

connect to the on-board S/PDIF digital interface receiver circuitry. To use an external digital audio source,

simply remove the shunts and connect a ribbon across the SCLK, LRCK, and SDIN pins located in the col-

umns labeled “EXT SAI”. A single ground column for the ribbon cable’s ground connection is provided to

maintain signal integrity.