INDUSTRIALTEMPERATURERANGE

IDT74LVC573A

3.3VCMOSOCTALTRANSPARENTD-TYPELATCH

1

MARCH 1999

INDUSTRIAL TEMPERATURE RANGE

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

© 1999 Integrated Device Technology, Inc.

DSC-4627/1

FEATURES:

• 0.5 MICRON CMOS Technology

• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using

machine model (C = 200pF, R = 0)

• CMOS power levels (0.4

µµµµµ W typ. static)

• Rail-to-rail output swing for increased noise margin

• All inputs, outputs, and I/O are 5V tolerant

• Supports hot insertion

• Available in SOIC, SSOP, QSOP, and TSSOP packages

FUNCTIONAL BLOCK DIAGRAM

APPLICATIONS:

• 5V and 3.3V mixed voltage systems

• Data communication and telecommunication systems

DRIVE FEATURES:

• High Output Drivers: ±24mA

• Reduced system switching noise

IDT74LVC573A

DESCRIPTION:

TheLVC573AoctaltransparentD-typelatchisbuiltusingadvanceddual

metal CMOS technology. The device features 3-state outputs designed

specifically for driving highly capacitive or relatively low-impedance loads,

andisparticularlysuitableforimplementingbufferregisters,input-output(I/

O) ports, bidirectional bus drivers, and working registers.

While the latch-enable (LE) input is high, the Q outputs follow the data

(D)inputs.WhenLEistakenlow,theQoutputsarelatchedatthelogiclevels

at the D inputs.

A buffered output-enable (OE) input can be used to place the eight

outputs in either a normal logic state (high or low logic levels) or a high-

impedance state. In the high-impedance state, the outputs neither load nor

drive the bus lines significantly. The high-impedance state and increased

drive provide the capability to drive bus lines without interface or pullup

components. OEdoesnotaffecttheinternaloperationsofthelatch.Olddata

can be retained or new data can be entered while the outputs are in the

high-impedance state.

The LVC573A has been designed with a ±24mA output driver. This

driver is capable of driving a moderate to heavy load while maintaining

speed performance.

Inputs can be driven from either 3.3V or 5V devices. This feature allows

the use of this device as a translator in a mixed 3.3V/5V system environ-

ment.

3.3V CMOS OCTAL

TRANSPARENT D-TYPE LATCH

WITH 3-STATE OUTPUTS

AND 5 VOLT TOLERANT I/O

OE

LE

1

D

TO SEVEN OTHER CHANNELS

1

11

2

19

1

D

1

Q