ADG736L datasheet(3/12 Pages) AD | CMOS Low Voltage 2.5 OHM Dual SPDT Switch

3 page

ADG736L

Rev. 0 | Page 3 of 12

SPECIFICATIONS

VDD = 5 V ± 10%, GND = 0 V; all specifications −40°C to +85°C, unless otherwise noted.

Table 1.

B Version 1

Parameter

25°C

−40°C to

+85°C

Unit

Test Conditions/Comments

ANALOG SWITCH

Analog Signal Range

0 V to VDD

On Resistance (RON)

2.5

Ω typ

VS = 0 V to VDD, IDS =

−10 mA; see Figure 10

4.5

Ω max

On Resistance Match Between Channels (∆RON)

0.1

Ω typ

VS = 0 V to VDD, IDS =

−10 mA

0.4

Ω max

On Resistance Flatness (RFLAT (ON))

0.5

Ω typ

VS = 0 V to VDD, IDS =

−10 mA

1.2

Ω max

LEAKAGE CURRENTS

VDD = 5.5 V

Source Off Leakage IS (OFF)

±0.01

nA typ

VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 11

±0.1

±0.3

nA max

Channel On Leakage ID, IS (ON)

±0.01

nA typ

VS = VD = 1 V or 4.5 V; see Figure 12

±0.1

±0.3

nA max

DIGITAL INPUTS

Input High Voltage, VINH

2.4

V min

Input Low Voltage, VINL

0.8

V max

Input Current, IINL or IINH

0.005

μA typ

VIN = VINL or VINH

±0.1

μA max

DYNAMIC CHARACTERISTICS 2

tON

ns typ

RL = 300 Ω, CL = 35 pF

ns max

VS = 3 V; see Figure 13

tOFF

ns typ

RL = 300 Ω, CL = 35 pF

ns max

VS = 3 V; see Figure 13

Break-Before-Make Time Delay, tD

ns typ

RL = 300 Ω, CL = 35 pF

ns min

VS1 = VS2 = 3 V; see Figure 14

Off Isolation

−62

dB typ

RL = 50 Ω, CL = 5 pF, f = 10 MHz

−82

dB typ

RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 15

Channel-to-Channel Crosstalk

−62

dB typ

RL = 50 Ω, CL = 5 pF, f = 10 MHz

−82

dB typ

RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 16

Bandwidth (–3 dB)

200

MHz typ

RL = 50 Ω, CL = 5 pF; see Figure 17

CS (OFF)

pF typ

CD, CS (ON)

pF typ

POWER REQUIREMENTS

VDD = 5.5 V

IDD

0.001

μA typ

Digital inputs = 0 V or 5 V

1.0

μA max

1 Temperature range is −40°C to +85°C for the B version.

2 Guaranteed by design; not subject to production test.

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