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SST34HF164G-70-4E-L3KE 데이터시트(PDF) 9 Page - Silicon Storage Technology, Inc |
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SST34HF164G-70-4E-L3KE 데이터시트(HTML) 9 Page - Silicon Storage Technology, Inc |
9 / 31 page Preliminary Specifications 16 Mbit Dual-Bank Flash + 2/4 Mbit SRAM ComboMemory SST34HF162G / SST34HF164G 9 ©2004 Silicon Storage Technology, Inc. S71276-00-000 11/04 TABLE 3: PIN DESCRIPTION Symbol Pin Name Functions AMSS1 to A0 Address Inputs To provide flash address, A19-A0. To provide SRAM address, AMSS-A0 DQ15-DQ0 Data Inputs/Outputs To output data during Read cycles and receive input data during Write cycles. Data is internally latched during a flash Erase/Program cycle. The outputs are in tri-state when OE#, BES#, and BEF# are high. BEF# Flash Memory Bank Enable To activate the Flash memory bank when BEF# is low BES# SRAM Memory Bank Enable To activate the SRAM memory bank when BES# is low OE# Output Enable To gate the data output buffers WE# Write Enable To control the Write operations UBS# Upper Byte Control (SRAM) To enable DQ15-DQ8 LBS# Lower Byte Control (SRAM) To enable DQ7-DQ0 WP# Write Protect To protect and unprotect the bottom 8 KWord (4 sectors) from Erase or Program operation RST# Reset To Reset and return the device to Read mode VSS Ground VDD Power Supply2 2.7-3.3V Power Supply VDDF Power Supply (Flash) 2.7-3.3V Power Supply to Flash only VDDS Power Supply (SRAM) 2.7-3.3V Power Supply to SRAM only NC No Connection Unconnected pins T3.0 1276 1. AMSS = Most Significant Address AMSS = A16 for SST34HF162G and A17 for SST34HF164G 2. L3K package only |
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