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SST55LC100 데이터시트(PDF) 5 Page - Silicon Storage Technology, Inc |
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SST55LC100 데이터시트(HTML) 5 Page - Silicon Storage Technology, Inc |
5 / 80 page Advance Information CompactFlash Card Controller SST55LC100 ©2005 Silicon Storage Technology, Inc. S71298-00-000 10/05 5 1.0 GENERAL DESCRIPTION The CompactFlash card controller contains a microcontrol- ler and embedded flash file system integrated in TQFP or TFBGA packages. Refer to Figure 2-1 for the Compact- Flash card controller block diagram. The controller inter- faces with the host system allowing data to be written to and read from the flash media. 1.1 Performance-optimized CompactFlash Card Controller The heart of the CompactFlash card is the CompactFlash card controller which translates standard CF signals into flash media data and control signals. The following compo- nents contribute to the CompactFlash card controller’s operation. 1.1.1 Microcontroller Unit (MCU) The MCU translates CF commands into data and control signals required for flash media operation. 1.1.2 Internal Direct Memory Access (DMA) The CompactFlash card controller uses internal DMA allowing instant data transfer from buffer to flash media. This implementation eliminates microcontroller overhead associated with the traditional, firmware-based approach, thereby increasing the data transfer rate. 1.1.3 Power Management Unit (PMU) The power management unit controls the power consump- tion of the CompactFlash card controller. The PMU dramat- ically reduces the power consumption of the CompactFlash card controller by putting the part of the cir- cuitry that is not in operation into sleep mode. 1.1.4 SRAM Buffer A key contributor to the CompactFlash card controller per- formance is an SRAM buffer. The buffer optimizes the host’s data transfer to and from the flash media. 1.1.5 Embedded Flash File System The embedded flash file system is an integral part of the CompactFlash card controller. It contains MCU firmware that performs the following tasks: 1. Translates host side signals into flash media writes and reads. 2. Provides dynamic flash media wear leveling to spread the flash writes across all unused memory address space to increase the longevity of flash media. 3. Keeps track of data file structures. 1.1.6 Error Correction Code (ECC) The CompactFlash card controller utilizes 72-bit Reed- Solomon Error Detection Code (EDC) and Error Correc- tion Code (ECC), which provides the following error immunity for each 512-byte block of data: 1. Corrects up to three random 12-bit symbol errors. 2. Corrects single bursts up to 25 bits. 3. Detects single bursts up to 61 bits and double bursts up to 15 bits. 4. Detects up to six random 12-bit symbol errors. 1.1.7 Serial Communication Interface (SCI) The Serial Communication Interface (SCI) is designed to report initialization errors and allow manufacturers to debug system failures. 1.1.8 Multi-tasking Interface The multi-tasking interface enables fast, sustained write performance by allowing concurrent Read, Program, and Erase operations to multiple flash media devices. |
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